Access to most VGA registers is done thru MMIO. For the ST01 register PIO access is used to maintain timing for DACDelay(), a delay function internal to libvgahw used to slow down access to the DAC registers sufficiently. PowerPC does not support PIO access, thus an access function thru MMIO is needed.
Signed-off-by: Egbert Eich <e...@freedesktop.org> --- src/nv_setup.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/nv_setup.c b/src/nv_setup.c index 92ca3ec..3cf3cfd 100644 --- a/src/nv_setup.c +++ b/src/nv_setup.c @@ -151,6 +151,14 @@ static CARD8 NVReadDacData(vgaHWPtr pVga) return (VGA_RD08(pNv->PDIO, VGA_DAC_DATA)); } +#if defined(__powerpc__) +static CARD8 NVReadST01(vgaHWPtr pVga) +{ + NVPtr pNv = (NVPtr)pVga->MMIOBase; + return (VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET)); +} +#endif + static Bool NVIsConnected (ScrnInfoPtr pScrn, int output) { @@ -357,6 +365,9 @@ NVCommonSetup(ScrnInfoPtr pScrn) pVga->readCrtc = NVReadCrtc; pVga->writeGr = NVWriteGr; pVga->readGr = NVReadGr; +#if defined(__powerpc__) + pVga->readST01 = NVReadST01; +#endif pVga->writeAttr = NVWriteAttr; pVga->readAttr = NVReadAttr; pVga->writeSeq = NVWriteSeq; -- 1.8.1.4 _______________________________________________ xorg-devel@lists.x.org: X.Org development Archives: http://lists.x.org/archives/xorg-devel Info: http://lists.x.org/mailman/listinfo/xorg-devel