Markus Wick <[email protected]> writes: > This is a bit too small imo. iirc glamor was used to split up renderings > to 64k vertices, not 64k bytes. > What is the cache implact on too big buffers? i965 must fall through to > LLC, so will it pollute the L1+L2 caches? > For non-coherent gpus, write combining also shouldn't pollute any > caches.
Yeah, for a first approximation, this is fine, but we'll obviously want to tune it based on credible performance analysis. Until that, there's no point adjusting it. -- [email protected]
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