On Wed, Jul 26, 2017 at 8:29 AM, Michel Dänzer <[email protected]> wrote: > On 25/07/17 05:28 PM, Nicolai Hähnle wrote: >> On 22.07.2017 14:00, Daniel Stone wrote: >>> >>> I don't have any great solution off the top of my head, but I'd be >>> inclined to bundle stride in with placement. TTBOMK (from having >>> looked at radv), buffers shared cross-GPU also need to be allocated >>> from a separate externally-visible memory heap. And at the moment, >>> lacking placement information at allocation time (at least for EGL >>> allocations, via DRIImage), that happens via transparent migration at >>> import time I think. Placement restrictions would probably also >>> involve communicating base address alignment requirements. >> >> Stride isn't really in the same category as placement and base address >> alignment, though. >> >> Placement and base address alignment requirements can apply to all >> possible texture layouts, while the concept of stride is specific to >> linear layouts. > > Also, the starting address of shareable buffers is generally aligned to > at least the CPU page size anyway. Do we know of any cases requiring > higher alignment than that, and if so, which address space does the > requirement apply to?
The highest base address alignment I know of is 2D tiling on Fiji = 256KB alignment. Marek _______________________________________________ [email protected]: X.Org development Archives: http://lists.x.org/archives/xorg-devel Info: https://lists.x.org/mailman/listinfo/xorg-devel
