Am Mittwoch, den 19.09.2007, 11:57 -0400 schrieb Alex Deucher: > > > > > Thanks, i only knew the old direct access type. > > I assume there additional functions similiar to out[b|w|..] for these > > indexed registers? > > No they are accessed via the same register access macros. Take a look > at the INPLL and OUTPLL macros in the radeon driver. the PLL > registers are also indirect. > > > Also, how do i determine the value for e.g. MCIND? > > There should two direct access registers: MC index and MC data. I > don't recall what the offsets are off hand. They should be in the > databooks and register header. So to access MCIND:0x4 and MCIND:0x5, > it work work something like: > > // select the indexed reg > OUTREG(MC_INDEX_REG, 0x4); > // read the indexed reg > value = INREG(MC_DATA_REG); > //write to the indexed reg > OUTREG(MC_DATA_REG, new_value); > // select another indexed reg > OUTREG(MC_INDEX_REG, 0x5); > etc. Dang, me and my memory. So its just like like the old e.g. CRTC at 0x03D4/5 (except that data reg is 32 bit instead of 8 bits). So OUTREG is defined via MMIO_OUT which calls xf86WriteMmio which strangely enough calls the assembler st* command (instead of out*) plus barrier() (whatever that is). Is this prefered to just calling the out* (and in*) commands directly? > > Alex
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