http://bugs.freedesktop.org/show_bug.cgi?id=12626





--- Comment #59 from Thomas Dekker <[EMAIL PROTECTED]>  2008-07-22 03:50:31 PST 
---
I think vsync is calculated wrong when an interlaced modeline is read, since
xrandr sets it correctly. Anything i can do to help you?

> As to pre-avivo chips,
> unfortunately, I cannot reproduce any problems with with interlaced modes 
> here.


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