On Tue, Dec 15, 2009 at 10:28 AM, Matthias Hopf <[email protected]> wrote: > ATI Radeon XPRESS 200M freezes on VT switch (often even during initial > Xserver start). It turned out to be a regression, which was introduced > with git commit 7d9f643ae3d07 for fixing xorg bug 21321. > > It seems that on this chip you cannot reliably disable crtcs. I tried to > work around that with usleep()s, but I didn't succeed fully. Patch 2+3 > are different attempts, both fix the issue somewhat, but after 5-60 VT > switches (depending on phase of the moon or whatever) the system freezes > again. Note that the freeze happens not at register access time, but > sometime later, sometimes a second later. Increasing the sleep time > doesn't help much. > > The attached Patch 1 disables crtc switch-off for the affected chips - > it seems on these chips there is not much potential for power saving > anyway, at least my measurements (when they were successful with one of > my other patches) were pretty inconclusive. > > I'd like to see Patch 1 applied. Patches 2 and 3 are just for reference. > If there is a different potential fix, I can reproduce the issue here > and would be able to test patches.
Thanks for looking at this Matthias. Based on your findings, I think the issue is that the crtc must be enabled when the crtc timing is programmed since you didn't touch the dpms code which also disables the crtc when the head is dpms off. Also, in the last hunk of the patch do you mean to force crtc1 or crtc2 on? You have + save->crtc_gen_cntl |= RADEON_CRTC2_EN; presumably it should be: + save->crtc2_gen_cntl |= RADEON_CRTC2_EN; Does this updated patch work? If so, I'll apply it. Alex
From 3a30210d50b27f8772fc5045133940246764fce9 Mon Sep 17 00:00:00 2001 From: Matthias Hopf <[email protected]> Date: Tue, 15 Dec 2009 10:53:48 -0500 Subject: [PATCH] fix 200M freezes on VT switch if CRTC is disabled It appears that RS4xx chips need to have the crtc enabled when the timing is programmed. agd5f: minor fixes/cleanup of the original patch --- src/legacy_crtc.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c index ed339ab..0ad762b 100644 --- a/src/legacy_crtc.c +++ b/src/legacy_crtc.c @@ -912,6 +912,11 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, ? RADEON_CRTC_INTERLACE_EN : 0)); + /* 200M freezes on VT switch sometimes if CRTC is disabled */ + if ((info->ChipFamily == CHIP_FAMILY_RS400) || + (info->ChipFamily == CHIP_FAMILY_RS480)) + save->crtc_gen_cntl |= RADEON_CRTC_EN; + save->crtc_ext_cntl |= (RADEON_XCRT_CNT_EN| RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_HSYNC_DIS | @@ -1162,6 +1167,11 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save, ? RADEON_CRTC2_INTERLACE_EN : 0)); + /* 200M freezes on VT switch sometimes if CRTC is disabled */ + if ((info->ChipFamily == CHIP_FAMILY_RS400) || + (info->ChipFamily == CHIP_FAMILY_RS480)) + save->crtc2_gen_cntl |= RADEON_CRTC2_EN; + save->disp2_merge_cntl = info->SavedReg->disp2_merge_cntl; save->disp2_merge_cntl &= ~(RADEON_DISP2_RGB_OFFSET_EN); -- 1.5.4.3
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