RADEONRestore() restores the CLOCK_CNTL_INDEX register before calling
RADEONRestorePLLRegisters(), which modifies the CLOCK_CNTL_INDEX register
to access the PLL registers.  As a result we may end up with the wrong clock
being selected when exiting X.  This happens on platforms where the driver
doesn't save and restore the VGA state.

Signed-off-by: Mark Kettenis <[email protected]>
---
 src/radeon_driver.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 20a81e6..35c2761 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -5825,8 +5825,6 @@ static void RADEONRestore(ScrnInfoPtr pScrn)
        RADEONRestoreMemMapRegisters(pScrn, restore);
        avivo_restore(pScrn, restore);
     } else {
-       OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
-       RADEONPllErrataAfterIndex(info);
        OUTREG(RADEON_RBBM_SOFT_RESET,  restore->rbbm_soft_reset);
        OUTREG(RADEON_DP_DATATYPE,      restore->dp_datatype);
        OUTREG(RADEON_GRPH_BUFFER_CNTL, restore->grph_buffer_cntl);
@@ -5852,6 +5850,9 @@ static void RADEONRestore(ScrnInfoPtr pScrn)
                RADEONRestoreTVRegisters(pScrn, restore);
        }
 
+       OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
+       RADEONPllErrataAfterIndex(info);
+
        RADEONRestoreBIOSRegisters(pScrn, restore);
     }
 
-- 
1.7.3.2

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