On Fri, Dec 21, 2012 at 3:22 PM, Albrecht Dreß <[email protected]> wrote: > Hi Alex! > > Am 21.12.12 19:44 schrieb(en) Alex Deucher: > >> Sounds like internal tmds may be broken in kms. Probably easiest to dump >> the registers from a working setup (console fb, or old version of the >> driver) and a non-working setup (driver with the attached patch applied). >> Then send me the output. > > > See attached: working Xorg w/ kernel 3.6.5 and fbdev, broken w/ kernel 3.7.1 > and radeon driver.
Does the attached patch help? Alex
From 4e8bd671c5e17a7cf8b64c151651866780da573f Mon Sep 17 00:00:00 2001 From: Alex Deucher <[email protected]> Date: Wed, 2 Jan 2013 20:29:00 -0500 Subject: [PATCH] drm/radeon: fix DFP setup on pre-avivo asics Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 60 +++++++------------------- 1 files changed, 16 insertions(+), 44 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 6857cb4..4c83d3d 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c @@ -53,7 +53,6 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, bool hscale = true, vscale = true; int hsync_wid; int vsync_wid; - int hsync_start; int blank_width; u32 scale, inc, crtc_more_cntl; u32 fp_horz_stretch, fp_vert_stretch, fp_horz_vert_active; @@ -68,7 +67,8 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, (RADEON_HORZ_FP_LOOP_STRETCH | RADEON_HORZ_AUTO_RATIO_INC); - crtc_more_cntl = 0; + crtc_more_cntl = (RADEON_CRTC_H_CUTOFF_ACTIVE_EN | + RADEON_CRTC_V_CUTOFF_ACTIVE_EN); if ((rdev->family == CHIP_RS100) || (rdev->family == CHIP_RS200)) { /* This is to workaround the asic bug for RMX, some versions @@ -76,35 +76,37 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, crtc_more_cntl |= RADEON_CRTC_H_CUTOFF_ACTIVE_EN; } + blank_width = (mode->crtc_hblank_end - mode->crtc_hblank_start) / 8; + if (blank_width > 110) + blank_width = 110; - fp_crtc_h_total_disp = ((((mode->crtc_htotal / 8) - 1) & 0x3ff) + fp_crtc_h_total_disp = (((blank_width) & 0x3ff) | ((((mode->crtc_hdisplay / 8) - 1) & 0x1ff) << 16)); hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8; if (!hsync_wid) hsync_wid = 1; - hsync_start = mode->crtc_hsync_start - 8; - fp_h_sync_strt_wid = ((hsync_start & 0x1fff) + fp_h_sync_strt_wid = ((((mode->crtc_hsync_start - mode->crtc_hblank_start) / 8) & 0x1fff) | ((hsync_wid & 0x3f) << 16) | ((mode->flags & DRM_MODE_FLAG_NHSYNC) ? RADEON_CRTC_H_SYNC_POL : 0)); - fp_crtc_v_total_disp = (((mode->crtc_vtotal - 1) & 0xffff) + fp_crtc_v_total_disp = (((mode->crtc_vblank_end - mode->crtc_vblank_start) & 0xffff) | ((mode->crtc_vdisplay - 1) << 16)); vsync_wid = mode->crtc_vsync_end - mode->crtc_vsync_start; if (!vsync_wid) vsync_wid = 1; - fp_v_sync_strt_wid = (((mode->crtc_vsync_start - 1) & 0xfff) - | ((vsync_wid & 0x1f) << 16) - | ((mode->flags & DRM_MODE_FLAG_NVSYNC) - ? RADEON_CRTC_V_SYNC_POL - : 0)); + fp_v_sync_strt_wid = ((((mode->crtc_vsync_start - mode->crtc_vblank_start) & 0xfff) + | ((vsync_wid & 0x1f) << 16) + | ((mode->flags & DRM_MODE_FLAG_NVSYNC) + ? RADEON_CRTC_V_SYNC_POL : 0))); - fp_horz_vert_active = 0; + fp_horz_vert_active = ((((mode->crtc_vdisplay - 1) << 16) & 0xfff) | + ((((mode->crtc_hdisplay / 8) - 1) & 0x1ff) << 16)); if (native_mode->hdisplay == 0 || native_mode->vdisplay == 0) { @@ -156,38 +158,8 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, crtc_more_cntl |= (RADEON_CRTC_AUTO_HORZ_CENTER_EN | RADEON_CRTC_AUTO_VERT_CENTER_EN); - blank_width = (mode->crtc_hblank_end - mode->crtc_hblank_start) / 8; - if (blank_width > 110) - blank_width = 110; - - fp_crtc_h_total_disp = (((blank_width) & 0x3ff) - | ((((mode->crtc_hdisplay / 8) - 1) & 0x1ff) << 16)); - - hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8; - if (!hsync_wid) - hsync_wid = 1; - - fp_h_sync_strt_wid = ((((mode->crtc_hsync_start - mode->crtc_hblank_start) / 8) & 0x1fff) - | ((hsync_wid & 0x3f) << 16) - | ((mode->flags & DRM_MODE_FLAG_NHSYNC) - ? RADEON_CRTC_H_SYNC_POL - : 0)); - - fp_crtc_v_total_disp = (((mode->crtc_vblank_end - mode->crtc_vblank_start) & 0xffff) - | ((mode->crtc_vdisplay - 1) << 16)); - - vsync_wid = mode->crtc_vsync_end - mode->crtc_vsync_start; - if (!vsync_wid) - vsync_wid = 1; - - fp_v_sync_strt_wid = ((((mode->crtc_vsync_start - mode->crtc_vblank_start) & 0xfff) - | ((vsync_wid & 0x1f) << 16) - | ((mode->flags & DRM_MODE_FLAG_NVSYNC) - ? RADEON_CRTC_V_SYNC_POL - : 0))); - - fp_horz_vert_active = (((native_mode->vdisplay) & 0xfff) | - (((native_mode->hdisplay / 8) & 0x1ff) << 16)); + fp_horz_vert_active = (((native_mode->vdisplay - 1) & 0xfff) | + ((((native_mode->hdisplay / 8) - 1) & 0x1ff) << 16)); break; case RMX_OFF: default: -- 1.7.7.5
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