https://bugs.freedesktop.org/show_bug.cgi?id=97610
--- Comment #2 from Kai <[email protected]> ---
(In reply to Tom St Denis from comment #1)
> Something I noted when trying amdgpu on my Bonaire was that some of the tile
> mode registers are not the same between AMDGPU and radeon. For example,
> with HAWAII tile mode 7 is
>
> tile[7] = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) |
> PIPE_CONFIG(ADDR_SURF_P4_16x16) |
> MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
> TILE_SPLIT(split_equal_to_row_size));
>
> with amdgpu and
>
> tile[7] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
> MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)
> |
> PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
> TILE_SPLIT(split_equal_to_row_size));
>
> with radeon (specifically the PIPE_CONFIG() and ARRAY_MODE() values are
> different).
>
> I don't know if this is related but I never got a satisfactory answer as to
> why this is the case.
So, basically copying the config from radeon (cik.c; the num_pipe_configs == 16
case for my Hawaii) to amdgpu (gfx_v7_0.c) should do the trick if this is the
cause? Or are there other parts I'd need to change if I touch the tile
configuration? And: shouldn't modesetting hitting this as well, if it's a
kernel issue? Or does modesetting only use a reduced set of tiling
configurations?
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