--- xserver/hw/xfree86/modes/xf86EdidModes.c.old	2008-09-28 14:36:55.000000000 +0800
+++ xserver/hw/xfree86/modes/xf86EdidModes.c	2008-09-28 14:39:45.000000000 +0800
@@ -94,6 +94,8 @@ typedef enum {
     DDC_QUIRK_DETAILED_SYNC_PP = 1 << 7,
     /* Force single-link DVI bandwidth limit */
     DDC_QUIRK_DVI_SINGLE_LINK = 1 << 8,
+    /* Vertical fresh  is too high */
+    DDC_QUIRK_VFRESH_85_TOO_HIGH = 1 << 9,
 } ddc_quirk_t;
 
 static Bool quirk_prefer_large_60 (int scrnIndex, xf86MonPtr DDC)
@@ -260,6 +262,11 @@ static const ddc_quirk_map_t ddc_quirks[
 	quirk_dvi_single_link, DDC_QUIRK_DVI_SINGLE_LINK,
 	"Forcing maximum pixel clock to single DVI link."
     },
+    {
+        quirk_vfresh_too_high,DDC_QUIRK_VFRESH_85_TOO_HIGH ,
+       "vfresh 85  is too high"
+    },
+
     { 
 	NULL,		DDC_QUIRK_NONE,
 	"No known quirks"
@@ -717,7 +724,25 @@ xf86DDCApplyQuirks(int scrnIndex, xf86Mo
 	}
     }
 }
+static void
+xf86DDCReduceClock(DisplayModePtr Modes,xf86MonPtr MonInfo)
+{
+        DisplayModePtr Mode;
+        int i;
 
+        for (i = 0; i < sizeof (MonInfo->det_mon) /sizeof (MonInfo->det_mon[0]); i++){
+                if (MonInfo->det_mon[i].type == DS_RANGES)
+                     MonInfo->det_mon[i].section.ranges.max_v = 75;
+        }
+        for(Mode = Modes; NULL != Mode ; Mode = Mode->next){
+                if(75 < xf86ModeVRefresh(Mode)){
+                        Mode->Clock = 75 * Mode->HTotal * Mode->VTotal;
+                        Mode->Clock = Mode->Clock/1000;
+                }
+        }
+
+
+}
 /**
  * Walks the modes list, finding the mode with the largest area which is
  * closest to the target refresh rate, and marks it as the only preferred mode.
@@ -827,6 +852,9 @@ xf86DDCGetModes(int scrnIndex, xf86MonPt
     if (quirks & DDC_QUIRK_PREFER_LARGE_75)
 	xf86DDCSetPreferredRefresh(scrnIndex, Modes, 75);
 
+    if(quirks & DDC_QUIRK_VFRESH_85_TOO_HIGH )
+            xf86DDCReduceClock(Modes,DDC);
+
     return Modes;
 }