On Wed, 30 Jan 2002 [EMAIL PROTECTED] wrote:

> >> Here you can see the problem when you are using a card in the second bus
> >> and are mapping the IO for the first.  To solve this there needs to be a
> >> bit of abstraction involved.  I suppose one could map all the IO's, and
> >> then set a flag in the driver which tells which bus this particular driver
> >> or IO operation is dealing with.

> >I wonder if we could use RAC for this, anyone with more knowledge of how RAC
> >works cares to comment ?

> It's my understanding that the domain patches (which are now in the trunk
> afaik) will handle this. I haven't had a chance to try them out yet on
> PPC though.

The Domain-branch changes are but a first step, and thus not sufficient,
to fix multi-head for PowerPC's.  Kernel changes are/were a second large
piece of this puzzle.  Beyond these two, there are a few relatively minor
XFree86 changes here and there (e.g, compiler.h, os-support/bus/Imakefile,
Pci.h, to name but a few) that are still needed.  All this is documented
in Domain.note and/or linuxPci.c comments.

But, by far, the most difficult part of implementing multi-head is in
dealing with the system chipsets found on these motherboards.  This
difficulty isn't technical at all, but is rooted in humanware.  What takes
the lllooonnnggg-est time is extracting the needed information from
manufacturers and/or other relevent parties, a process I have found, and
still find, akin to pulling hens teeth.  To be fair, this situation isn't
PowerPC-specific.

On the technical side, when looking at the various CPU architectures out
there, the main problem is that quite a number of radically different PCI
schemes have been married to those CPUs and XFree86's model of what a
host-bridge/chipset is isn't yet general enough to handle them all.
XFree86 still has a rather simplistic picture gleaned from its ix86
origins.

Anyway, I'll keep plugging away at this, as I have for almost two years
now.

Marc.

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