This backports an upstream patch that makes ethernet work again for RK3288.
Signed-off-by: Romain Perier <[email protected]> --- ...3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch | 36 ++++++++++++++++++++++ recipes-bsp/u-boot/u-boot_%.bbappend | 6 ++++ 2 files changed, 42 insertions(+) create mode 100644 recipes-bsp/u-boot/u-boot/0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch diff --git a/recipes-bsp/u-boot/u-boot/0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch b/recipes-bsp/u-boot/u-boot/0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch new file mode 100644 index 0000000..b08d331 --- /dev/null +++ b/recipes-bsp/u-boot/u-boot/0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch @@ -0,0 +1,36 @@ +From fefe9d06bd0917739822a4be4c702f1d5d0e0899 Mon Sep 17 00:00:00 2001 +From: Romain Perier <[email protected]> +Date: Fri, 2 Jun 2017 11:19:43 +0200 +Subject: [PATCH] rockchip: rk3288: grf: Fix shift for + RK3288_TXCLK_DLY_ENA_GMAC_ENABLE + +RK3288_TXCLK_DLY_ENA_GMAC_ENABLE, in GRF_SOC_CON3, is supposed to be bit +0xe and not 0xf. Otherwise, it is RGMII RX clock delayline enable and +introduces random delays and data lose. + +This commit fixes the issue by replacing RK3288_TXCLK_DLY_ENA_GMAC_ENABLE +with the right shift. + +Upstream-Status: Backported (http://git.denx.de/?p=u-boot/u-boot-rockchip.git;a=patch;h=fefe9d06bd0917739822a4be4c702f1d5d0e0899) + +Signed-off-by: Romain Perier <[email protected]> +Reviewed-by: Simon Glass <[email protected]> +--- + arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h +index 7d56b8c..fbc4a0d 100644 +--- a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h ++++ b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h +@@ -813,7 +813,7 @@ enum { + (1 << RK3288_TXCLK_DLY_ENA_GMAC_SHIFT), + RK3288_TXCLK_DLY_ENA_GMAC_DISABLE = 0, + RK3288_TXCLK_DLY_ENA_GMAC_ENABLE = +- (1 << RK3288_RXCLK_DLY_ENA_GMAC_SHIFT), ++ (1 << RK3288_TXCLK_DLY_ENA_GMAC_SHIFT), + + RK3288_CLK_RX_DL_CFG_GMAC_SHIFT = 0x7, + RK3288_CLK_RX_DL_CFG_GMAC_MASK = +-- +1.7.10.4 diff --git a/recipes-bsp/u-boot/u-boot_%.bbappend b/recipes-bsp/u-boot/u-boot_%.bbappend index efa5eae..1c4c150 100644 --- a/recipes-bsp/u-boot/u-boot_%.bbappend +++ b/recipes-bsp/u-boot/u-boot_%.bbappend @@ -1,6 +1,12 @@ # Copyright (C) 2017 Romain Perier <[email protected]> # Released under the MIT license (see COPYING.MIT for the terms) +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" + +SRC_URI += "\ + file://0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch \ +" + do_compile_append () { # Copy spl to default search path, so do_install from u-boot.inc # works -- 1.8.3.1 -- _______________________________________________ yocto mailing list [email protected] https://lists.yoctoproject.org/listinfo/yocto
