Hi Friends,

Please send me suitable profiles along with the Rate confirmation only to 

Position: ASIC Validation Engineer
Location: Hillsboro, OR
Duration: 6-12+ Months 
Rate: $55-58/Hr MAX
Face to Face maybe required!! Candidates in and around OR required!! 


Local candidates are always preferred (they will be considered first), but not 


Daily Responsibilities: 


- Run and analyze analog and/or digital circuit simulations. Make the necessary 
modifications for circuits to meet performance targets.

- Run layout extraction.

- Work with the mask design team to ensure layout is completed to engineering 

- Run static timing analysis for digital circuits and ensure they meet 
performance targets.

- Perform Function Equivalence Verification

- Validate circuit functionality with mixed signal verification.


Necessary Skills (Must Have):


-Demonstrable knowledge of transistor level circuit design and optimization at 
a level that meets with our basic requirements for the position 

- Use and familiarity with timing tools (Pathmill, Prime-time), Parasitic 
extraction (StarRC-XT), transistor circuit simulation, mixed signal validation 
(VCS® and/or nanosim®, ADMS), Register Transfer Level (RTL) to schematic 
verification tools (Verplex and/or Conformal), and Design Rule Checking (DRC) 
and/or LVS (Hercules) 

- A minimum of three years of previous experience and/or exposure to the design 
of IOs, PLLs, DLLs or memories design experience


Additional Skills Desired (Nice to Have): 


-Design experience with high speed serial IO, QPI or PCIe* would be an added 

Brad Young
Data Group Inc
Website: www.datagroupinc.net

Certified Minority Women Owned Business Enterprise (MWBE) & Small Business 
Enterprise (SBE) 

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