The ESP32 has got several MMUs. The characteristics are different depending on the part that a given MMU accesses (flash, ROM, SRAM, external memory). Some things are accessed using Memory Protection Units instead, which control access by Process ID, but don't do mapping. Others including some of the SRAMs are accessed through an MMU that can do virtual to physical mapping. The MMUs for internal SRAM0 and 2 choose protection for a given physical page as none, one or all of PIDs 2 to 7, with the virtual address that maps to it. PIDs 0 and 1 can access everything. PID 0 can execute privileged instructions. A large chunk of SRAM (SRAM 1) has only Memory Protection and no translation. The external memory MMU is the most general (most conventional).
On Fri, Aug 9, 2019 at 3:19 PM Bakul Shah <ba...@bitblocks.com> wrote: > esp32 doesn’t have an mmu, right? > > On Jul 26, 2019, at 03:30, Charles Forsyth <charles.fors...@gmail.com> > wrote: > > I was thinking of doing that since I've got an ESP-32 for some reason > > On Fri, Jul 26, 2019 at 7:38 AM Cyber Fonic <cyberfo...@gmail.com> wrote: > >> I was reading the post Why Didn't Plan 9 Succeed >> <https://news.ycombinator.com/item?id=20527650> on Hacker News. >> >> Made me think that Plan 9 for IoT system of systems could be viable. >> >> To that end, ESP-32 modules look capable enough to run Plan 9, but is >> there a Plan 9 C compiler for Xtensa ISA CPUs? >> >>
