> 
> This is exactly backward, and which makes using it as an unqualified
> presumption a little odd.  Fetching an object from true RAM is substantially
> more expensive than executing an instruction in the CPU, and the gap has
> only gotten worse with time.


That wasn't my point, which you may have missed.  The point is that with
our current technology track it's far cheaper to double your memory
than to double your CPU speed.  I'm not referring to the amount of memory
bits processed by the CPU, but the total number of pigeonholes available.  
These are not one and the same.

Therefore you can make gains in representational power by boosting the
amount of RAM, and having each bit of memory be a more precise
representation.  You can afford to have, for example, a neuron encoding
blue sofas and a neuron encoding red sofas.  While a more restricted RAM
approach would need to rely on a distributed representation, one with only
sofa neurons and color neurons. (apologies for the poor example, but I'm 
in a hurry)

Your points are correct, but refer to the bottleneck of getting 
information from RAM to the CPU, not on the total amount of RAM available.  


> Back to the problem of the human brain, a big part of the problem in the
> silicon case is that the memory is too far from the processing which adds
> hard latency to the system.  The human brain has the opposite problem, the
> "processing" is done in the same place as the "memory" it operates on (great
> for latency), but the operational speed of the processing architecture is
> fundamentally very slow.  The reason the brain seems so fast compared to
> silicon for many tasks is that the brain can support a spectacular number of
> effective memory accesses per second that silicon can't touch.

Both technologies have their advantages and disadvantages.  The brain's
memory capacity (in terms of number of addressable bits) cannot be
increased easily while a computer's can be.  I merely suggest that this
fundamental difference is something to consider if one is intent on
implementing AGI in a Neumann architechture.




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