FYI - This is informational only. It may or may not apply to your case.

The PCI spec does not require all latency timers are writable. Latency
Timers are only required to be writable for PCI bus masters, and then
only if they burst more than two data phases, however for any bus master
device that bursts 16 or less data phases the register may be read only.

Check to see if this device is a bus master. Mine (on this machine in a
Via 8235 chipset) reports that it is not.

Having a latency timer of 0 says that when the system removes the PCI
bus grant that this device reports it will release the bus immediately.
It may or may not actually do that, but this is the value it reports.


On Sat, 2004-02-14 at 01:39, Hamish Moffatt wrote:
> Hi all,
> 
> lspci -vv shows that the latency_timer of my nForce's AC97 function is
> set to 0, but the device would really like more than that!
> 
> However, when I set it with setpci, nothing changes according to lspci.
> 
> Anyone know a workaround/fix?
> 
> I'm using a Gigabyte 7N400 Pro2 board.
> 
> I suspect that the value of 0 may be involved in my MythTV buffering
> problems.
> 
> 
> Thanks
> Hamish



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