On 8 July 2011 22:19, Alex Hacker <hac...@epn.ru> wrote: > Oh sorry, let me take last words back. Robert is right it does not work with > AR9380. > Power control mechanism does not depend on > AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit. > The AR_PHY_POWER_TX_RATE_MAX register contains a different value 0x00367044 > on AR9380 and > 0x0000007f on older chips.
Except that the AR9300 TPC enable code does exactly the same as the TPC enable code for the AR5416 series chips. By the way, the 11n rate scenario code doesn't have any per-rate TPC code in it. Only the TX power for rate series 0 is set. Is this potentially causing you problems? >From a cursory examination of the AR9300 code (and I should say, I've not even used an AR9300 yet, let alone tinkered with the TPC stuff) it looks all very straightforward. Unless some other chip functionality is required that hasn't been ported to ath9k, it "should just work". Sorry, I can't be more helpful than that. (Also, it'd be nice if someone contributed per-packet TPC support - proper support at that! - to ath9k. :) adrian _______________________________________________ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
