W dniu 4 stycznia 2010 16:42 użytkownik Michael Buesch <m...@bu3sch.de> napisał: > On Monday 04 January 2010 11:23:36 Rafał Miłecki wrote: >> W dniu 4 stycznia 2010 11:03 użytkownik Michael Buesch <m...@bu3sch.de> >> napisał: >> > On Monday 04 January 2010 01:10:32 Rafał Miłecki wrote: >> >> Please, see table on: >> >> http://bcm-v4.sipsolutions.net/ChipCommon >> > >> > No I mean where does the specs say to _write_ to that register? >> >> Whoops, sorry. You can find this in: >> http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N >> 3. If PHY revision >= 3, bit 0x00001000 is set in the board flags, and >> this is a 2 GHz band >> a. Set bit 0x40 in the Chip Control register (0x28) > > > Ok, it's not entirely clear to me whether this is the CHIPCTL register in > the chipcommon core. But if it is, just do something like this: > > chipco_set32(&dev->dev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40); > > I think it's probably not necessary to introduce a function in > driver_chipcommon.c > for this oneliner.
Thank you for your help, I appreciate it. Larry: could you just confirm my understanding of docs? Did you mean chipcommon core in that N-PHY init step? -- Rafał _______________________________________________ Bcm43xx-dev mailing list Bcm43xx-dev@lists.berlios.de https://lists.berlios.de/mailman/listinfo/bcm43xx-dev
