* Linux Kernel: http://casper.berkeley.edu/svn/trunk/roach/sw/binaries/linux/uImage-jiffy-20091110 *) Timing ("jiffy") changes. * tcpborphserver (KATCP server on ROACH): http://casper.berkeley.edu/svn/trunk/roach/sw/binaries/tcpborphserver/tcpborphserver2-2010-03-23-pid *) Bug fix: previously had to clear fpga before reprogramming. *) Now reports BORPH PID in status message. * tgtap: http://casper.berkeley.edu/svn/trunk/roach/sw/binaries/tgtap/tgtap_2010-03-24 *) No change since Tue, 15 Dec 2009. * Linux Root filesystem: http://casper.berkeley.edu/svn/trunk/roach/sw/binaries/filesystem/filesystem_etch_2010-03-24_sd_shipping.tar.gz *) Misc small changes. See README in the root. *) Shipping with third roach production batch. *) Added aforementioned tcpborphserver2 and tgtap. *) Standard Debian rc scripts (no more rcSimple).*) Defaults to mounting root filesystem read/write. Note to network-boot users: watch out for multiple boards trying to read/write to the same filesystem, thereby overwriting each others' files. Mod fstab or the kernel boot (init) string in uboot as appropriate
* Update your base-system Simulink SVN repository:*) The open-source XAUI block has been disabled. The XAUI/10GbE yellow block uses the Xilinx core irrespective of checkbox state. *) The open-source 10GbE core (10GbEv2) has a bug where it drops packets ev'ry now'n again. (~1 in four million packets). Use the original 10GbE (v1) core for now if you need all your packets. *) A bugfix for the QDR controller was checked-in some weeks back. Please ensure that you're using the latest SVN checkout of the libraries if you're using QDR on ROACH.
* Uboot: http://casper.berkeley.edu/svn/trunk/roach/sw/binaries/uboot/uboot-clkfix-20091113.bin *) No change since Thu, 12 Nov 2009. * CPLD: http://casper.berkeley.edu/svn/trunk/roach/gw/binaries/roach_cpld/roach_cpld_8_0_1588.jed *) No change since Tue, 25 Aug 2009.* Roach monitor (Actel Fusion): http://casper.berkeley.edu/svn/trunk/roach/gw/binaries/roach_monitor/roach_monitor_8_3_1698.stp and http://casper.berkeley.edu/svn/trunk/roach/gw/binaries/roach_monitor/roach_monitor_8_3_1698.ufc
*) No change since Thu, 22 Oct 2009.
And to reiterate, because it seems many missed this update:
Reliability problems and PPC DRAM issues:
=========================================
Early ROACH boards (serial numbers 01yyxx, 0201xx and 0202xx) were
shipped in bootstrap configuration H (configured for 500MHz CPU,
166MHz DRAM, 83MHz bus), which we have found to be unreliable on some
boards. If you're experiencing kernel panics, memory errors or general
unreliable operation, please change to configuration C (533MHz CPU,
133MHz RAM, 66MHz bus). This can be done in multiple ways:
1) By simply toggling the first "ConfigDIP" switch to "on" (this
is how ROACH production batch three will probably ship),
or,2) If you don't have local access to the board or it's in a rack, you can also do it remotely by toggling a bit in the onboard monitoring chip (Actel Fusion); easiest to use menu-driven python frontend http://casper.berkeley.edu/svn/trunk/roach/sw/roach_monitor/roach_monitor.py
and then hard-restart the board.If you've got a serial port plugged-in, Uboot will report these speeds in its boot messages (see examples below).
Also please consider replacing the PPC's standard memory module with a registered DIMM (like the one in the FPGA's DRAM slot). There is a single clock line on the PPC's DRAM interface which was routed poorly (it is out of spec), but is only used by unregistered modules so inserting a registered DIMM fixes any remaining memory issues. ROACH production batch 3 (0203xx, 03xxyy) and onwards will be shipping with registered DIMMs in the PPC slot.
POTENTIALLY BAD MEMORY SETTINGS: ================================ U-Boot 2008.10-svn2226 (Nov 13 2009 - 09:27:45)CPU: AMCC PowerPC 440EPx Rev. A at 500 MHz (PLB=166, OPB=83, EBC=83 MHz)
No Security/Kasumi support
Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
...
GOOD MEMORY SETTINGS:
=====================
U-Boot 2008.10-svn2226 (Nov 13 2009 - 09:27:45)
CPU: AMCC PowerPC 440EPx Rev. A at 533.333 MHz (PLB=133, OPB=66,
EBC=66 MHz)
No Security/Kasumi support
Bootstrap Option C - Boot ROM Location EBC (16 bits)
32 kB I-Cache 32 kB D-Cache
Board: Roach
I2C: ready
DTT: 1 is 25 C
DRAM: (spd v1.2) dram: notice: ecc ignored
1 GB
FLASH: 64 MB
USB: Host(int phy) Device(ext phy)
Net: ppc_4xx_eth0
Roach Information
Serial Number: 030101
Monitor Revision: 8.3.1698
CPLD Revision: 8.0.1588
type run netboot to boot net...
Jason
