On Mon, 03 Jan 2000, Dussart Alexandre wrote:
> If it doesn't support well please send me the output of:
> pnpdump (as root)
> and your hardware name/configuration
On a brand new mirror/install, no support for my Gravis Ultrasound PnP.
It's an ISA card, well supported by ALSA. Here pnpdump output:
# $Id: pnpdump.c,v 1.20 1999/12/02 22:39:24 fox Exp $
# Release isapnptools-1.20
# This is free software, see the sources for details.
# This software has NO WARRANTY, use at your OWN RISK
#
# For details of this file format, see isapnp.conf(5)
#
# For latest information and FAQ on isapnp and pnpdump see:
# http://www.roestock.demon.co.uk/isapnptools/
#
# Compiler flags: -DREALTIME -DNEEDSETSCHEDULER -DABORT_ONRESERR
#
# Trying port address 0273
# Board 1 has serial identifier 0a ff ff ff ff 01 00 56 1e
# (DEBUG)
(READPORT 0x0273)
(ISOLATE PRESERVE)
(IDENTIFY *)
(VERBOSITY 2)
(CONFLICT (IO FATAL)(IRQ FATAL)(DMA FATAL)(MEM FATAL)) # or WARNING
# Card 1: (serial identifier 0a ff ff ff ff 01 00 56 1e)
# Vendor Id GRV0001, No Serial Number (-1), checksum 0x0A.
# Version 1.0, Vendor version 1.2
# ANSI string -->UltraSound Plug & Play<--
#
# Logical device id GRV0000
# Device supports I/O range check register
# Device supports vendor reserved register @ 0x3b
# Device supports vendor reserved register @ 0x3c
# Device supports vendor reserved register @ 0x3d
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE GRV0001/-1 (LD 0
# Vendor defined tag: 72 fd ff
# ANSI string -->Synth & Codec<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# IRQ 11, 12 or 15.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 11 (MODE +E)))
# First DMA channel 5.
# 16 bit DMA only
# Logical device is a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 5))
# Next DMA channel 7.
# 16 bit DMA only
# Logical device is a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 7))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0220
# IO base alignment 1 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0320
# Maximum IO base address 0x0320
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 1 (SIZE 8) (BASE 0x0320) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x032c
# Maximum IO base address 0x032c
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x032c) (CHECK))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 11, 12 or 15.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 1, 3, 5, 6 or 7.
# 8 & 16 bit DMA
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
# Next DMA channel 1, 3, 5, 6 or 7.
# 8 & 16 bit DMA
# Logical device is a bus master
# DMA may execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 1))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0220
# IO base alignment 1 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0320
# Maximum IO base address 0x0320
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 1 (SIZE 8) (BASE 0x0320) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x032c
# Maximum IO base address 0x032c
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x032c) (CHECK))
# Start dependent functions: priority acceptable
# IRQ 11, 12 or 15.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 11 (MODE +E)))
# First DMA channel 5.
# 16 bit DMA only
# Logical device is a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 5))
# Next DMA channel 7.
# 16 bit DMA only
# Logical device is a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 7))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0240
# Maximum IO base address 0x0240
# IO base alignment 1 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0240) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0340
# Maximum IO base address 0x0340
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 1 (SIZE 8) (BASE 0x0340) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x034c
# Maximum IO base address 0x034c
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x034c) (CHECK))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 11, 12 or 15.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 1, 3, 5, 6 or 7.
# 8 & 16 bit DMA
# Logical device is a bus master
# DMA may execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
# Next DMA channel 1, 3, 5, 6 or 7.
# 8 & 16 bit DMA
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 1))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0240
# Maximum IO base address 0x0240
# IO base alignment 1 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0240) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0340
# Maximum IO base address 0x0340
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 1 (SIZE 8) (BASE 0x0340) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x034c
# Maximum IO base address 0x034c
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x034c) (CHECK))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 11, 12 or 15.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 1, 3, 5, 6 or 7.
# 8 & 16 bit DMA
# Logical device is a bus master
# DMA may execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
# Next DMA channel 1, 3, 5, 6 or 7.
# 8 & 16 bit DMA
# Logical device is a bus master
# DMA may execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 1))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0230
# Maximum IO base address 0x0230
# IO base alignment 1 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0230) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0330
# Maximum IO base address 0x0330
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 1 (SIZE 8) (BASE 0x0330) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x033c
# Maximum IO base address 0x033c
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x033c) (CHECK))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 11, 12 or 15.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 1, 3, 5, 6 or 7.
# 8 & 16 bit DMA
# Logical device is a bus master
# DMA may execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
# Next DMA channel 1, 3, 5, 6 or 7.
# 8 & 16 bit DMA
# Logical device is a bus master
# DMA may execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 1))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0250
# Maximum IO base address 0x0250
# IO base alignment 1 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0250) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0350
# Maximum IO base address 0x0350
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 1 (SIZE 8) (BASE 0x0350) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x035c
# Maximum IO base address 0x035c
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x035c) (CHECK))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 11, 12 or 15.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 1, 3, 5, 6 or 7.
# 8 & 16 bit DMA
# Logical device is a bus master
# DMA may execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
# Next DMA channel 1, 3, 5, 6 or 7.
# 8 & 16 bit DMA
# Logical device is a bus master
# DMA may execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 1))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0260
# Maximum IO base address 0x0260
# IO base alignment 1 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0260) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0360
# Maximum IO base address 0x0360
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 1 (SIZE 8) (BASE 0x0360) (CHECK))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x036c
# Maximum IO base address 0x036c
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x036c) (CHECK))
# End dependent functions
(NAME "GRV0001/-1[0]{Synth & Codec }")
# (ACT Y)
))
#
# Logical device id GRV0011
# Device supports I/O range check register
# Device supports vendor reserved register @ 0x38
# Device supports vendor reserved register @ 0x3b
# Device supports vendor reserved register @ 0x3c
# Device supports vendor reserved register @ 0x3d
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE GRV0001/-1 (LD 1
# ANSI string -->Disabled Device<--
(NAME "GRV0001/-1[1]{Disabled Device }")
# (ACT Y)
))
#
# Logical device id PNPb02f
# Device supports I/O range check register
# Device supports vendor reserved register @ 0x3b
# Device supports vendor reserved register @ 0x3c
# Device supports vendor reserved register @ 0x3d
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE GRV0001/-1 (LD 2
# ANSI string -->Game Port<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0201
# Maximum IO base address 0x0201
# IO base alignment 1 bytes
# Number of IO addresses required: 1
# (IO 0 (SIZE 1) (BASE 0x0201) (CHECK))
# Start dependent functions: priority functional
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0200
# Maximum IO base address 0x02ff
# IO base alignment 1 bytes
# Number of IO addresses required: 1
# (IO 0 (SIZE 1) (BASE 0x0200) (CHECK))
# End dependent functions
(NAME "GRV0001/-1[2]{Game Port }")
# (ACT Y)
))
#
# Logical device id GRV0003
# Device supports I/O range check register
# Device supports vendor reserved register @ 0x3b
# Device supports vendor reserved register @ 0x3c
# Device supports vendor reserved register @ 0x3d
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE GRV0001/-1 (LD 3
# ANSI string -->SB Compatible Audio<--
# First DMA channel 1.
# 8 bit DMA only
# Logical device is a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# IRQ 5.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 2
# (IO 0 (SIZE 2) (BASE 0x0388) (CHECK))
# Start dependent functions: priority acceptable
# IRQ 5 or 7.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 2
# (IO 0 (SIZE 2) (BASE 0x0388) (CHECK))
# Start dependent functions: priority functional
# IRQ 3, 5, 7 or 9.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 3 (MODE +E)))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x038a
# Maximum IO base address 0x03f0
# IO base alignment 2 bytes
# Number of IO addresses required: 2
# (IO 0 (SIZE 2) (BASE 0x038a) (CHECK))
# End dependent functions
(NAME "GRV0001/-1[3]{SB Compatible Audio }")
# (ACT Y)
))
#
# Logical device id GRV0004
# Device supports I/O range check register
# Device supports vendor reserved register @ 0x3b
# Device supports vendor reserved register @ 0x3c
# Device supports vendor reserved register @ 0x3d
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE GRV0001/-1 (LD 4
# ANSI string -->MPU-401 GM Music<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0330
# Maximum IO base address 0x0330
# IO base alignment 2 bytes
# Number of IO addresses required: 2
# (IO 0 (SIZE 2) (BASE 0x0330) (CHECK))
# Start dependent functions: priority functional
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0340
# IO base alignment 16 bytes
# Number of IO addresses required: 2
# (IO 0 (SIZE 2) (BASE 0x0300) (CHECK))
# Start dependent functions: priority functional
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0332
# Maximum IO base address 0x0326
# IO base alignment 2 bytes
# Number of IO addresses required: 2
# (IO 0 (SIZE 2) (BASE 0x0332) (CHECK))
# End dependent functions
(NAME "GRV0001/-1[4]{MPU-401 GM Music }")
# (ACT Y)
))
# End tag... Checksum 0x00 (OK)
# Returns all cards to the "Wait for Key" state
(WAITFORKEY)
--
David Hart
Vincity Design
*Proudly sent from Linux Mandrake 6.1*
