There are some of the finer details here:
http://wiki.davincidsp.com/index.php?title=Cache_Management
 
In short, however, Codec Engine's _only_ cache management is in the
DSP-side skeletons - that is, on the remote processor, managing data
buffers for remote algorithms.  It never manages the cache for
application side buffers and/or local algs.  That is always the
responsibility of the application (the wiki article above describes why
CE can't do this right).
 
To restate, the following general, HW-agnostic statement can be made:
   The application must manage any data buffers that are cached to the
application processor.
 
The rules for doing this are in the wiki article above.  (Feel free to
update it if you like - including snipping parts of this email!)  ;)
 
Historically, and in all DVEVM demos to date, the ARM-side data buffers
(typically from CMEM) are not cached to the application processor, so
the applications didn't have to manage it.  This general lack of app
exposure to cache details is why it's commonly mis-perceived that "Codec
Engine handles cache".  It doesn't, in general.  However, CE will take
care of the cache if these data buffers end up being given to remote
algs.
 
Chris


________________________________

        From:
[EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]
com] On Behalf Of Ben White
        Sent: Thursday, November 08, 2007 3:52 AM
        To: davinci-linux-open-source@linux.davincidsp.com
        Subject: Cache coherency managed by Codec Engine for DSP-only
apps?
        
        

        Hi,

         

        I am running my CE algo and client app all on the DSP side. I am
having a problem with cache coherency. In the DSP client side I am
populating a buffer in DDR2 with some test data. In the DSP algo side, I
am using EDMA to transfer this data from DDR2 to L1DSRAM.

         

        The problem is that the first 64 bytes of the transferred buffer
are garbled. Looking at the memory viewer, the first 64 bytes of my DDR2
buffer are in L1D Cache.

         

        So my question is whether the CE runtime will flush the cache in
all cases, or only when managing client/algo scenarios across ARM & DSP
boundaries?

         

        Thanks!

        Ben

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