There is a config param in the new ti.sdo.ce.alg.Settings module, very
poorly documented in CE 2.00, but we'll have better docs in future
releases. The config param you care about is .useCache, by default it's
false, but you can set it to true in your app's .cfg script. Something
like:
algSettings = xdc.useModule('ti.sdo.ce.alg.Settings');
algSettings.useCache = true;
Once you set .useCache to true, all memory provided to the ARM-side algs
will have its cache enabled - this is an app-wide flag. (Interestingly,
apps in other processes can set this flag differently if they wish!)
[ For those following along, note that this memory is memory the _alg_
requests under the covers during the *_create() calls. We're not
talking about the data buffers which the _app_ requests. _Those_ app
buffers can also now be requested to be cached on a per-buffer basis,
using the 'params' field of the new Memory_alloc() fxn, in CE 2.00. ]
And finally, I'm not sure whether you'll stumble on any cache-related
coherency issues in your codec - if all references to that memory are
via the CPU, you should be fine.
Hope that helps!
Chris
> -----Original Message-----
> From: Kumar Brajbhushan [mailto:[EMAIL PROTECTED]
> Sent: Wednesday, January 23, 2008 8:24 PM
> To: Ring, Chris; davinci-linux-open-source@linux.davincidsp.com
> Subject: RE: How to make CMEM cacheable on ARM side on DM6446?
>
> Chris,
>
> Thanks a lot!
>
> I am using CE 2.0, XDC_3_00_2, bios_5_31_08 for a non-VISA
> component. I
> have written stubs/skeletons for this component based on example one
> available for video component. Yes, I am trying to run the component
> from ARM side as local.
>
> As compared to the case when the component is run without
> Codec Engine,
> it takes 11 times more time for execution. I found the
> culprit to be the
> memories allocated by Memory_contigAlloc() and VISA_create.
> The allocate
> memories in CMEM. Instead if I override those memory chunks with one
> allocated on heap (ARM-side) via malloc() then there is no performance
> penalty. That's the reason I am looking for an option to make CMEM
> cacheable on ARM-side.
>
> Do you imply that CMEM is used for algorithm creation ONLY when it is
> local? I was under the impression that CMEM has to be used for remote
> components (DSP-side).
>
> One related query is how does CE support memory relocation? Is it
> possible for application to override the memory allocated by CE for an
> algorithm on ARM-side or DSP-side?
>
> Best Regards,
> Kumar
>
>
> -----Original Message-----
> From: Ring, Chris [mailto:[EMAIL PROTECTED]
> Sent: Wednesday, January 23, 2008 10:35 PM
> To: Kumar Brajbhushan; davinci-linux-open-source@linux.davincidsp.com
> Subject: RE: How to make CMEM cacheable on ARM side on DM6446?
>
> Can you help us understand your usage a little better (and
> which version
> of CE you're using)?
>
> VISA_create() is an "SPI" - System Programming Interface - used by
> algorithm providers that are integrating non-xDM algorithms into the
> Codec Engine environment. Is that what you're trying to do?
>
> And CMEM is only used during algorithm creation when the alg is local
> (i.e. ARM-side). Is that also what you're trying to do?
>
> [ And finally, just to tempt you, the recently released CE
> 2.00 and CMEM
> 2.00 have some cache-able buffer support... I just want to understand
> your use case before making a recommendation. ]
>
> Chris
>
> > -----Original Message-----
> > From: [EMAIL PROTECTED]
> > [mailto:[EMAIL PROTECTED]
> ] On Behalf Of Kumar Brajbhushan
> > Sent: Wednesday, January 23, 2008 2:48 AM
> > To: davinci-linux-open-source@linux.davincidsp.com
> > Subject: How to make CMEM cacheable on ARM side on DM6446?
> >
> > All,
> >
> > I am trying to profile a component on ARM side of DM6446.
> VISA_Create
> > allocates memory for this component from CMEM area which is
> not cached
> > on ARM side. Because of this there is huge increase in the
> time taken
> > for processing.
> >
> > Is there a way to cache this CMEM on ARM side as well? Or to direct
> > VISA_create to allocate memories from other sections
> (non-CMEM, memory
> > cached on ARM side).
> >
> > Best Regards,
> > Kumar
> >
> >
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