On 2012-12-13 14:28, Sekhar Nori wrote:
> On 12/13/2012 2:17 AM, Thomas Lange wrote:
>> The time drift problem I have been chasing for a while, see
>> http://linux.davincidsp.com/pipermail/davinci-linux-open-source/2012-December/025821.html
>> , seems to be due to an undocumented silicon bug.
>>
>> The attached patch to master ( c22cf7755db6500df037cecdd6b290394d82392e
>>   Origin: git://gitorious.org/linux-davinci/linux-davinci.git )
>> exercises the problem. Example console output from my EVM6446 card:
>>
>> ----------------
>> Before  T0:0x5ed55a T1:0x5ed55d Diff:-3
>> After  T0:0x5ed817 T1:0x5ed824 Diff:-13
>> Before  T0:0x62a7e5 T1:0x62a7f3 Diff:-14
>> After  T0:0x62adff T1:0x62ae17 Diff:-24
>> Before  T0:0x66cbfb T1:0x66cc14 Diff:-25
>> After  T0:0x66d1f6 T1:0x66d219 Diff:-35
>> Before  T0:0x6aeab0 T1:0x6aead4 Diff:-36
>> After  T0:0x6af0ec T1:0x6af11a Diff:-46
>> Before  T0:0x6f09ef T1:0x6f0a1e Diff:-47
>> After  T0:0x6f1018 T1:0x6f1051 Diff:-57
>> Before  T0:0x732821 T1:0x73285b Diff:-58
>> After  T0:0x732e1a T1:0x732e5e Diff:-68
>> ---------------
>>
>> This shows that TIM34_0 misses 11 ticks every time a new event is setup
>> (10 ticks from my test loop + the original code 1).
>>
>> If someone from TI can verify that the problem exists in all Davinci
>> versions, a workaround should be pretty straightforward, assuming this
>> is the only symptom of the bug.
> 
> I was not able to spend too much time on this today, but I did try your
> patch on my DM644x EVM and have observations similar to what you
> describe above. Further, I see that reading TIM12 instead of writing it
> does not cause the same drift on TIM34. I still need to try on a
> different DaVinci device.

Like I wrote in patch, my DM6443 based card behaves the same.

> One thing to try would be to temporarily stop both TIM12_0 and TIM34_0
> using ENAMODE bits in TCR before resetting TIM12_0. There is a cryptic
> note about writes to timer register being disallowed when timer is
> running in section 2.4.2 of http://www.ti.com/lit/ug/sprue26/sprue26.pdf

It says that timer registers are protected by hardware when the timer is active.
I guess writes are ignored if timer is active.

Regards,
/Thomas
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