Hi, To follow up on the recent discussions about the LM32 MMU. I think we can all agree to use virtually indexed physically tagged caches that run in parallel with the CPU caches. Then to solve aliasing and/or context switch problems two major options were proposed: a) Use a process ID tag in the cache. Problems: limits the number of processes we can have without flushing the caches at each context switch, data cache cannot be used for inter-process communication, OS still has to check for aliasing when the same process maps the same physical address twice (rare case though). b) Use a simple cache with cache associativity * page size = cache size. Advantages: simple hardware, and solves above problems. Problems: a bit less flexible, and if we do not want to flush caches at context switches we must ensure that shared memory areas are mapped at the same virtual addresses in all processes that use it. I'm not familiar enough with how OSes deal with virtual memory to know if this is a strong constraint or not. Comments?
Let's make the MMU design happen :) S. _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode Twitter: www.twitter.com/milkymistvj Ideas? http://milkymist.uservoice.com
