On 28/3/2024 6:43 am, Sebastian Huber wrote: > This helps to provide a shared implementation of the kernel I/O support. > --- > bsps/aarch64/xilinx-zynqmp/console/console.c | 4 +- > bsps/aarch64/xilinx-zynqmp/include/bsp.h | 2 + > bsps/arm/xilinx-zynq/console/console-config.c | 5 +- > bsps/arm/xilinx-zynq/include/bsp.h | 1 + > .../console/console-config.c | 4 +- > bsps/arm/xilinx-zynqmp-rpu/include/bsp.h | 2 + > .../xilinx-zynqmp/console/console-config.c | 4 +- > bsps/arm/xilinx-zynqmp/include/bsp.h | 2 + > bsps/include/dev/serial/zynq-uart-zynq.h | 66 +++++++++++++++++++ > bsps/include/dev/serial/zynq-uart-zynqmp.h | 66 +++++++++++++++++++ > 10 files changed, 148 insertions(+), 8 deletions(-) > create mode 100644 bsps/include/dev/serial/zynq-uart-zynq.h > create mode 100644 bsps/include/dev/serial/zynq-uart-zynqmp.h > > diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c > b/bsps/aarch64/xilinx-zynqmp/console/console.c > index 1e5df997e8..ce031a914e 100644 > --- a/bsps/aarch64/xilinx-zynqmp/console/console.c > +++ b/bsps/aarch64/xilinx-zynqmp/console/console.c > @@ -188,11 +188,11 @@ RTEMS_SYSINIT_ITEM( > static zynq_uart_context zynqmp_uart_instances[2] = { > { > .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), > - .regs = (volatile struct zynq_uart *) 0xff000000, > + .regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR, > .irq = ZYNQMP_IRQ_UART_0 > }, { > .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), > - .regs = (volatile struct zynq_uart *) 0xff010000, > + .regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR, > .irq = ZYNQMP_IRQ_UART_1 > } > }; > diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp.h > b/bsps/aarch64/xilinx-zynqmp/include/bsp.h > index 0ccca8b196..38a9fad768 100644 > --- a/bsps/aarch64/xilinx-zynqmp/include/bsp.h > +++ b/bsps/aarch64/xilinx-zynqmp/include/bsp.h > @@ -55,6 +55,8 @@ > #include <rtems.h> > #include <rtems/termiostypes.h> > > +#include <dev/serial/zynq-uart-zynqmp.h> > + > #ifdef __cplusplus > extern "C" { > #endif /* __cplusplus */ > diff --git a/bsps/arm/xilinx-zynq/console/console-config.c > b/bsps/arm/xilinx-zynq/console/console-config.c > index d22ceb557d..42e64ee4dd 100644 > --- a/bsps/arm/xilinx-zynq/console/console-config.c > +++ b/bsps/arm/xilinx-zynq/console/console-config.c > @@ -35,15 +35,16 @@ > > #include <bsp/irq.h> > #include <dev/serial/zynq-uart.h> > +#include <dev/serial/zynq-uart-regs.h> > > zynq_uart_context zynq_uart_instances[2] = { > { > .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), > - .regs = (volatile struct zynq_uart *) 0xe0000000, > + .regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR, > .irq = ZYNQ_IRQ_UART_0 > }, { > .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), > - .regs = (volatile struct zynq_uart *) 0xe0001000, > + .regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR, > .irq = ZYNQ_IRQ_UART_1 > } > }; > diff --git a/bsps/arm/xilinx-zynq/include/bsp.h > b/bsps/arm/xilinx-zynq/include/bsp.h > index 3311a99b50..5ffd5f573a 100644 > --- a/bsps/arm/xilinx-zynq/include/bsp.h > +++ b/bsps/arm/xilinx-zynq/include/bsp.h > @@ -55,6 +55,7 @@ > #include <bsp/default-initial-extension.h> > #include <bsp/start.h> > #include <dev/serial/zynq-uart.h> > +#include <dev/serial/zynq-uart-zynq.h> > > #ifdef __cplusplus > extern "C" { > diff --git a/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c > b/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c > index eacf6ddcce..13eaa269c5 100644 > --- a/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c > +++ b/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c > @@ -44,11 +44,11 @@ > static zynq_uart_context zynqmp_uart_instances[2] = { > { > .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), > - .regs = (volatile struct zynq_uart *) 0xff000000, > + .regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR, > .irq = ZYNQMP_IRQ_UART_0 > }, { > .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), > - .regs = (volatile struct zynq_uart *) 0xff010000, > + .regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR, > .irq = ZYNQMP_IRQ_UART_1 > } > }; > diff --git a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h > b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h > index e386bd4b26..d80cedbd0d 100644 > --- a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h > +++ b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h > @@ -61,6 +61,8 @@ > #include <bsp/start.h> > #include <peripheral_maps/xilinx_zynqmp.h> > > +#include <dev/serial/zynq-uart-zynqmp.h> > + > #ifdef __cplusplus > extern "C" { > #endif /* __cplusplus */ > diff --git a/bsps/arm/xilinx-zynqmp/console/console-config.c > b/bsps/arm/xilinx-zynqmp/console/console-config.c > index ea148836a5..787ee05dd6 100644 > --- a/bsps/arm/xilinx-zynqmp/console/console-config.c > +++ b/bsps/arm/xilinx-zynqmp/console/console-config.c > @@ -44,11 +44,11 @@ > static zynq_uart_context zynqmp_uart_instances[2] = { > { > .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), > - .regs = (volatile struct zynq_uart *) 0xff000000, > + .regs = (volatile struct zynq_uart *) ZYNQ_UART_0_BASE_ADDR, > .irq = ZYNQMP_IRQ_UART_0 > }, { > .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), > - .regs = (volatile struct zynq_uart *) 0xff010000, > + .regs = (volatile struct zynq_uart *) ZYNQ_UART_1_BASE_ADDR, > .irq = ZYNQMP_IRQ_UART_1 > } > }; > diff --git a/bsps/arm/xilinx-zynqmp/include/bsp.h > b/bsps/arm/xilinx-zynqmp/include/bsp.h > index a08a5feee9..cdc37b79a4 100644 > --- a/bsps/arm/xilinx-zynqmp/include/bsp.h > +++ b/bsps/arm/xilinx-zynqmp/include/bsp.h > @@ -60,6 +60,8 @@ > #include <bsp/default-initial-extension.h> > #include <bsp/start.h> > > +#include <dev/serial/zynq-uart-zynqmp.h> > + > #ifdef __cplusplus > extern "C" { > #endif /* __cplusplus */ > diff --git a/bsps/include/dev/serial/zynq-uart-zynq.h > b/bsps/include/dev/serial/zynq-uart-zynq.h > new file mode 100644 > index 0000000000..169037b33a > --- /dev/null > +++ b/bsps/include/dev/serial/zynq-uart-zynq.h > @@ -0,0 +1,66 @@ > +/* SPDX-License-Identifier: BSD-2-Clause */ > + > +/** > + * @file > + * > + * @ingroup zynq_uart > + * > + * @brief This header file provides interfaces with respect to the Zynq > + * platform. > + */ > + > +/* > + * Copyright (C) 2024 embedded brains GmbH & Co. KG > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions > + * are met: > + * 1. Redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer. > + * 2. Redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in the > + * documentation and/or other materials provided with the distribution. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS > IS" > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE > + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE > + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR > + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF > + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS > + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN > + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) > + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE > + * POSSIBILITY OF SUCH DAMAGE. > + */ > + > +#ifndef _DEV_SERIAL_ZYNQ_UART_ZYNQ_H > +#define _DEV_SERIAL_ZYNQ_UART_ZYNQ_H > + > +#ifdef __cplusplus > +extern "C" { > +#endif /* __cplusplus */ > + > +/** > + * @addtogroup zynq_uart > + * > + * @{ > + */ > + > +/** > + * @brief This constant defines the Xilinx Zynq UART 0 base address. > + */ > +#define ZYNQ_UART_0_BASE_ADDR 0xe0000000 > + > +/** > + * @brief This constant defines the Xilinx Zynq UART 1 base address. > + */ > +#define ZYNQ_UART_1_BASE_ADDR 0xe0001000 > + > +/** @} */ > + > +#ifdef __cplusplus > +} > +#endif /* __cplusplus */ > + > +#endif /* _DEV_SERIAL_ZYNQ_UART_ZYNQ_H */ > diff --git a/bsps/include/dev/serial/zynq-uart-zynqmp.h > b/bsps/include/dev/serial/zynq-uart-zynqmp.h > new file mode 100644 > index 0000000000..9f29003053 > --- /dev/null > +++ b/bsps/include/dev/serial/zynq-uart-zynqmp.h > @@ -0,0 +1,66 @@ > +/* SPDX-License-Identifier: BSD-2-Clause */ > + > +/** > + * @file > + * > + * @ingroup zynq_uart > + * > + * @brief This header file provides interfaces with respect to the Zynq > + * UltraScale+ MPSoC and RFSoC platforms. > + */ > + > +/* > + * Copyright (C) 2024 embedded brains GmbH & Co. KG > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions > + * are met: > + * 1. Redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer. > + * 2. Redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in the > + * documentation and/or other materials provided with the distribution. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS > IS" > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE > + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE > + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR > + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF > + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS > + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN > + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) > + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE > + * POSSIBILITY OF SUCH DAMAGE. > + */ > + > +#ifndef _DEV_SERIAL_ZYNQ_UART_ZYNQMP_H > +#define _DEV_SERIAL_ZYNQ_UART_ZYNQMP_H > + > +#ifdef __cplusplus > +extern "C" { > +#endif /* __cplusplus */ > + > +/** > + * @addtogroup zynq_uart > + * > + * @{ > + */ > + > +/** > + * @brief This constant defines the Xilinx Zynq UART 0 base address. > + */ > +#define ZYNQ_UART_0_BASE_ADDR 0xff000000 > + > +/** > + * @brief This constant defines the Xilinx Zynq UART 1 base address. > + */ > +#define ZYNQ_UART_1_BASE_ADDR 0xff010000
This is the same as the Versal so is the name of this file OK for use in the Versal? I do not have a better name? Chris _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel