On Thu, 2003-08-28 at 12:46, Marc Aurele La France wrote: > Secondly, EFI is already doing the wrong thing by marking PCI ROMs as > non-cacheable. This doesn't inspire confidence...
I believe there is a difference between ROM's being logically cacheable and the way the ZX1 actually "wires" that memory into the memory system. The ZX1 connection to PCI devices are always non-cached. It's a simplified assumption correct in most all cases with little penalty for the rare case of cacheable memory sitting out in MMIO space. Therefore EFI is not doing the wrong thing by marking ROM as non-cacheable, the ZX1 is going to treat any PCI address as non-cached by design. _______________________________________________ Devel mailing list [EMAIL PROTECTED] http://XFree86.Org/mailman/listinfo/devel
