On 17/04/2023 23:21, Marijn Suijten wrote:
Since hardware revision 5.0.0 the TE configuration moved out of the
PINGPONG block into the INTF block. Writing these registers has no
effect, and is omitted downstream via the DPU/SDE_PINGPONG_TE feature
flag. This flag is only added to PINGPONG blocks used by hardware prior
to 5.0.0.
The existing PP_BLK_TE macro has been removed in favour of directly
passing this feature flag, which has thus far been the only difference
with PP_BLK. PP_BLK_DITHER has been left in place as its embedded
feature flag already excludes this DPU_PINGPONG_TE bit and differs by
setting the block length to zero, as it only contains a DITHER subblock.
The code that writes to these registers in the INTF block will follow in
subsequent patches.
Signed-off-by: Marijn Suijten <marijn.suij...@somainline.org>
---
.../drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 8 +++----
.../gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 8 +++----
.../gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 12 +++++------
.../drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 12 +++++------
.../gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 12 +++++------
.../gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 4 ++--
.../gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 2 +-
.../drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 2 +-
.../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 12 +++++------
.../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 8 +++----
.../drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 24 ++++++++++-----------
.../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 16 +++++++-------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 25 ++++++++++------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 12 ++++++-----
14 files changed, 78 insertions(+), 79 deletions(-)
Reviewed-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
--
With best wishes
Dmitry
