This adds the needed clock resets for all rk3588(s) based SOCs.

Signed-off-by: Detlev Casanova <detlev.casan...@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 6ac5ac8b48abb..8560c92cd406c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1193,6 +1193,14 @@ vop: vop@fdd90000 {
                              "pclk_vop";
                iommus = <&vop_mmu>;
                power-domains = <&power RK3588_PD_VOP>;
+               resets = <&cru SRST_D_VOP0>,
+                        <&cru SRST_D_VOP1>,
+                        <&cru SRST_D_VOP2>,
+                        <&cru SRST_D_VOP3>;
+               reset-names = "dclk_vp0",
+                             "dclk_vp1",
+                             "dclk_vp2",
+                             "dclk_vp3";
                rockchip,grf = <&sys_grf>;
                rockchip,vop-grf = <&vop_grf>;
                rockchip,vo1-grf = <&vo1_grf>;
-- 
2.43.2

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