Alex,
On 1/15/07, Alex Deucher <[EMAIL PROTECTED]> wrote:
On 1/15/07, Phillip Ezolt <[EMAIL PROTECTED]> wrote:
> Jerome,
>
> On 1/13/07, Jerome Glisse <[EMAIL PROTECTED] > wrote:
> > >
> > > Is it something like this:
> > >
> > > BEGIN_RING(2);
> > > OUT_RING( CP_PACKET0( RADEON_SCRATCH_REG5, 0 ) ); \
> > > OUT_RING( 0xDEADBEEF); \
> > > ADVANCE_RING()
> > > COMMIT_RING()
> >
> > Should be do the work, then you read the scratch reg via MMIO to see
> > if the value was set.
>
> Alright, I tried that, but no luck.
>
> I was able to read and write the register using a MMIO, but when I wrote
to
> the register with the CP, the value never showed up on in the
register. (I
> waited for the cp to idle before I read it back.. I also read it a few
> seconds later..)
>
> However, the read pointer IS advancing, so the cp must be doing
something.
> I suspect that it is just executing random commands. So, my current
theory
> is that:
> 1) The CP is actually working. (Because the read pointer is advancing..)
> 2) The ring buffer instructions are not being written where the card is
> reading them from.
>
> (BTW. I suspected that the Microcode might not be loading properly, but
I
> was able to read it back, and it matched what was written.)
> ...
The r300 microcode in the current drm may not work properly on XPRESS
cards period. You might try again with the microcode you extract from
fglrx or the windows driver. Updated microcode for some of the other
cards may fix other problems. Perhaps it make sense to figure out
what microcode fglrx loads on which cards.
Alex
Alright. This is easy enough for me to try. I can get the EXACT FW that the
8.32.5 driver uses for my card by running one of the dump routines that I
have laying around. (After fglrx has started up.)
BTW. I actually put the FW from a previous version of the driver (pre 8.32.5),
and it didn't make a difference. However, I haven't tried it with the
8.32.5 version of fglrx... which works pretty well with this card.
Thanks for the hint. I'll do it tonight.
Cheers,
--Phil
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