On 11/04/2013 05:27 PM, Daniel Vetter wrote:
> On Mon, Nov 04, 2013 at 05:57:39AM -0800, Thomas Hellstrom wrote:
>> The code handles three different cases:
>> 1) physical page addresses. The ttm page array is used.
>> 2) DMA subsystem addresses. A scatter-gather list is used.
>> 3) Coherent pages. The ttm dma pool is used, together with the dma_ttm
>> array os dma_addr_t
>>
>> Signed-off-by: Thomas Hellstrom <thellst...@vmware.com>
>> Reviewed-by: Jakob Bornecrantz <ja...@vmware.com>
> For i915.ko use we've added page iterators which should walk the physical
> backing storage.
>
> commit a321e91b6d73ed011ffceed384c40d2785cf723b
> Author: Imre Deak <imre.d...@intel.com>
> Date:   Wed Feb 27 17:02:56 2013 -0800
>
>      lib/scatterlist: add simple page iterator
>
>

Yes, I saw those iterators, (nice stuff!) and my patch are using them as 
a "base class", handling also
TTM page - and dma address arrays basically with the same interface. In 
the long run we might
want to move ttm over to sg_tables as well.

One problem, though, the page iterators break in the mapped case where
sg_dma_len(sg) != sg_len(sg).
An iommu implementation is allowed to reduce the sg list to a single 
segment, in which case those page
iterators will fall apart. I was planning to see if I could fix that up, 
but unfortunately there is no generic
dma_to_phys.
It all works now because intel_iommu, amd_iommu and swiotlb all keep the 
number of entries in an
sg list across mapping....

/Thomas

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