I ran into a similar problem with the Samsung S3C45xx HAL. However, I fixed it by defining my own HAL_FLASH_CACHES_OFF(), HAL_FLASH_CACHES_ON() macros in my platform HAL, which overrides that defined in flash.h.
The problem I had was that the HAL_FLASH_CACHES_OFF() macro in flash.h were incorrect for my platform (probably all platforms). The problem was that the HAL_FLASH_CACHES_OFF() macro was invalidating the cache tags before disabling the cache, causing a race condition that would occasionally lead to cache coherency problems and the code crashing. Disabling interrupts would also plug the race condition, but I reordered the macro to achieve the same thing without disabling interrupts. Jay -----Original Message----- From: Retallack, Mark [mailto:[EMAIL PROTECTED] Sent: Thursday, March 02, 2006 2:47 AM To: ecos-discuss@ecos.sourceware.org Subject: [ECOS] Problem found with flash driver Hello everyone, I think I have found a minor problem with the io layer of the flash driver and before I continue with my fix, I just thought that I would ask if anyone else has seen it. I am using JFFS2 over a flash bank that I am not running code from, so interrupts can be enabled during flash access. The processor is an MPC850. With the virgin eCos flash.c code (from CVS), the system crashes with a random memory corruption, I have tracked it down to a context switch within the flash_program function in flash.c. After looking through the file and the eCos mailing list I found that the HAL_FLASH_CACHES_OFF define states that interrupts must be disabled. After modding the code to disable interrupts before flushing and disabling the cache, the system works correctly with no problems. I have not created a patch because the HAL_FLASH_CACHES_OFF define in flash.h looks very generic and I cannot test the mod. But this is what I have done: // Note: the ucache code has not been tested yet on any target. #define HAL_FLASH_CACHES_OFF(_d_, _i_) \ CYG_MACRO_START \ _i_ = 0; /* avoids warning */ \ unsigned long __state; \ HAL_DISABLE_INTERRUPTS(__state); \ HAL_UCACHE_IS_ENABLED(_d_); \ HAL_UCACHE_SYNC(); \ HAL_UCACHE_INVALIDATE_ALL(); \ HAL_UCACHE_DISABLE(); \ HAL_RESTORE_INTERRUPTS(__state); \ CYG_MACRO_END #define HAL_FLASH_CACHES_ON(_d_, _i_) \ CYG_MACRO_START \ unsigned long __state; \ HAL_DISABLE_INTERRUPTS(__state); \ if (_d_) HAL_UCACHE_ENABLE(); \ HAL_RESTORE_INTERRUPTS(__state); \ CYG_MACRO_END #else // HAL_CACHE_UNIFIED #define HAL_FLASH_CACHES_OFF(_d_, _i_) \ CYG_MACRO_START \ _i_ = 0; /* avoids warning */ \ unsigned long __state; \ HAL_DISABLE_INTERRUPTS(__state); \ HAL_DCACHE_IS_ENABLED(_d_); \ HAL_DCACHE_SYNC(); \ HAL_DCACHE_INVALIDATE_ALL(); \ HAL_DCACHE_DISABLE(); \ HAL_ICACHE_INVALIDATE_ALL(); \ HAL_RESTORE_INTERRUPTS(__state); \ CYG_MACRO_END #define HAL_FLASH_CACHES_ON(_d_, _i_) \ CYG_MACRO_START \ unsigned long __state; \ HAL_DISABLE_INTERRUPTS(__state); \ if (_d_) HAL_DCACHE_ENABLE(); \ HAL_RESTORE_INTERRUPTS(__state); \ CYG_MACRO_END I know that someone else has already pointed out this potential problem, but no fix was added, this makes me worry because I cannot be the only persion who is using the jffs2 system on a powerpc 850, and this is a very easy problem to reproduce. Mark Retallack Embedded Software Engineer Siemens Traffic Controls Sopers Lane, Poole, Dorset. BH17 7ER. UK. Tel: 01202 782189 Fax: 01202 782545 www.siemenstraffic.com Committed to quality traffic solutions and service excellence Todays Quote: I want the presidency so bad I can already taste the hors d'oeuvres. -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
