>> Could be any number of things, but looks like maybe a signal >> integrity issue or incorrect bitfile to me. >> >> 1. What length and kind of cable connects the 7I43 to the PC? >> (cable should be IEEE-1284 compatible or flatcable, other >> printer cables may not have enough >> grounds) >> >> 2. You are using a bitfile for a 200K 7I43, is the 7I43 a >> 7I43-2?. The 200K >> 7I43s are a bit rare. >> >> 2A. If you do indeed have a 7I43-2, I will check the SV8S >> bitfile here. I dont >> think the 200k bitfiles have been tested as thoroughly >> as the 400K ones >> >> 3. The FPGA's EPP interface is more tolerant of bad >> end-of-cable signal >> integrity than the CPLDs EPP interface (due to CPLD space >> limitations) >> The FPGA bitfiles are CRC checked, but we have seen >> download problems that >> the CRC checking misses. >> One thing you might try to do to narrow down the problem >> is to load the >> FPGA via the local EEPROM instead of from the host. This >> will require using >> a windows machine and USB >> >> >> Peter Wallace >> Mesa Electronics >> > > 1. I'll work on a better cable. I've got IDC26F connectors and some > spare 26 flat cable and will crimp up something shortly.
Cable is important > > 2. Yes. My 7i43 has FPGA XC3S200 (3s200tq144), I think this equates to > 7i43-2, card part# 7I43-U. I've noticed your updates mesanet 7i43.zip > and will re-download and check md5sum's for 200K bitfiles. > > 3. Fine. Do I use sc7i43w.exe to load USBIOPR8 to FPGA (ram?) and > scm7i43w.exe for firmware SV8S.BIT to serial eeprom? Will hostmot2 still > allow for GPIO of un-initialized functions, when booting from eeprom? > I'd think hostmot2/hm2_7i43 would init the same regardless of boot image > source (host or eeprom). Only need servo stuff and possibly some general > IO, so SV8 on eeprom would be great. Yes thats the EEPROM bootstrap process (via USB. you can do a similar thing via EPP and DOS but I'd like to eliminate the possibility of bad EPP firmware transfer). The setup of the HostMot2 config is completely independent of how the firmware is loaded (EEPROM or file-from-host) > > Additionally, I've made JTAG connectors before for satellite boxes, what > is DB25 to P6 pinout? I realize this is probably all google-able, since > 7i43.pdf lists pin functions. Just curious. To work with Xilinx tools you need a Parallel Cable IV or parallel cable III or Xilinx USB cable. The Parallel cable III is just a buffer or 2 at end of the cable and the schematic is available on the web. I have a little SMD PCB Parallel cable III clone with some improvements, I can send you a bare PCB if you wish > > Thanks, > Keil > > > > > > ------------------------------------------------------------------------- > This SF.Net email is sponsored by the Moblin Your Move Developer's challenge > Build the coolest Linux based applications with Moblin SDK & win great prizes > Grand prize is a trip for two to an Open Source event anywhere in the world > http://moblin-contest.org/redirect.php?banner_id=100&url=/ > _______________________________________________ > Emc-users mailing list > Emc-users@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/emc-users > Peter Wallace Mesa Electronics (\__/) (='.'=) This is Bunny. Copy and paste bunny into your (")_(") signature to help him gain world domination. ------------------------------------------------------------------------- This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK & win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100&url=/ _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
