On Thu, Apr 08, 2010 at 10:46:22AM -0400, Mike Tancsa wrote:
>
> OK, some more data... It seems dhclient is getting upset as well
> since the updated driver
>
> Apr 8 10:28:37 ich10 dhclient[1383]: DHCPDISCOVER on em0 to
> 255.255.255.255 port 67 interval 6
> Apr 8 10:28:38 ich10 dhclient[1383]: ip length 328 disagrees with
> bytes received 332.
> Apr 8 10:28:38 ich10 dhclient[1383]: accepting packet with data
> after udp payload.
> Apr 8 10:28:38 ich10 dhclient[1383]: DHCPOFFER from 192.168.xx.1
> Apr 8 10:28:40 ich10 dhclient[1383]: DHCPREQUEST on em0 to
> 255.255.255.255 port 67
> Apr 8 10:28:40 ich10 dhclient[1383]: ip length 328 disagrees with
> bytes received 332.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Try this patch. It should fix the issue. It seems Jack forgot to
strip CRC bytes as old em(4) didn't strip it, probably to
workaround silicon bug of old em(4) controllers.
It seems there are also TX issues here. The system load is too high
and sometimes system is not responsive while TX is in progress.
Because I initiated TCP bulk transfers, TSO should reduce CPU load
a lot but it didn't so I guess it could also be related watchdog
timeouts you've seen. I'll see what can be done.
Index: sys/dev/e1000/if_em.c
===================================================================
--- sys/dev/e1000/if_em.c (revision 206399)
+++ sys/dev/e1000/if_em.c (working copy)
@@ -3706,6 +3706,8 @@
rxr->next_to_refresh = i;
}
update:
+ bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
if (cleaned != -1) /* Update tail index */
E1000_WRITE_REG(&adapter->hw,
E1000_RDT(rxr->me), cleaned);
@@ -4039,7 +4041,8 @@
rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
(hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
-
+ /* Strip CRC bytes. */
+ rctl |= E1000_RCTL_SECRC;
/* Make sure VLAN Filters are off */
rctl &= ~E1000_RCTL_VFE;
rctl &= ~E1000_RCTL_SBP;
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