Hello,
when working on the AVR target I stepped over the follwoing issue (IMO not
urgent but still bearing quite some potential of improvement):
When implementing "lowering" of SImode and HImode expressions to QImode
sequences by splitters after reload, quite a number of new optimization
opportunities show up that presently are not realized. These would probably
require that some kind of constant propagation and algebraic simplification
would be re-run *after* reload.
A typical case are mixed-mode expressions like in the function
uint16_t
dummy (uint8_t y, uint32_t x)
{
return x & y;
}
which yields a RTL sequence like
(insn 32 8 13 0 (set (reg:QI 25 r25 [ y+1 ])
(const_int 0 [0x0])) 9 {*movqi} (nil)
(nil))
(insn 33 17 34 0 (set (reg:QI 24 r24 [ <result> ])
(and:QI (reg:QI 24 r24 [orig:45 y ] [45])
(reg:QI 20 r20 [orig:43 x ] [43]))) 44 {andqi3} (nil)
(expr_list:REG_DEAD (reg:QI 20 r20 [orig:43 x ] [43])
(nil)))
(insn 34 33 26 0 (set (reg:QI 25 r25 [ <result>+1 ])
(and:QI (reg:QI 25 r25 [ y+1 ])
(reg:QI 21 r21 [ x+1 ]))) 44 {andqi3} (nil)
(expr_list:REG_DEAD (reg:QI 21 r21 [ x+1 ])
(nil)))
. Here insn 34 could have been optimized away ( (0 & reg21) is always zero).
Such situation could not be identified before doing the splitting.
After seing such situation a couple of times in my application code, I am
wondering: ... Is there already a pass that implements a suitable kind of
algebraic simplification and constant propagation on the RTL level that could
be re-run after reload?
Alternatively: Is there a method how splitter patterns could find out whether
one of the register input operands maybe holds a known constant value?
Yours,
Bj�rn
