Currently, it is not possible to use SSE 4.1 variable blend instructions in asm statements. These instructions require the third argument to be in %xmm0, but gcc fails to allocate correct register even when (new) "z" constraint is used.
--cut here-- typedef float V4SFmode __attribute__((vector_size(16))); V4SFmode t (V4SFmode a, V4SFmode b, V4SFmode c) { V4SFmode ret; asm ("blenvdps %0, %2, %3" : "=x" (ret) : "0" (a), "x" (b), "z" (c)); return ret; } --cut here-- gcc -O1 -msse prxxx.c: In function 't': prxxx.c:7: error: can't find a register in class 'SSE_FIRST_REG' while reloading 'asm' prxxx.c:7: error: 'asm' operand has impossible constraints -- Summary: [4.3 Regression] Can not allocate %xmm0 register for variable blend insn Product: gcc Version: 4.3.0 Status: UNCONFIRMED Keywords: ssemmx, ra Severity: normal Priority: P3 Component: target AssignedTo: unassigned at gcc dot gnu dot org ReportedBy: ubizjak at gmail dot com GCC build triplet: i686-pc-linux-gnu GCC host triplet: i686-pc-linux-gnu GCC target triplet: i686-pc-linux-gnu OtherBugsDependingO 32189 nThis: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32201