There is no vec_unpacks_{hi,lo}_v8sf necessary for v8sf -> v8df float extension.
Index: config/i386/sse.md =================================================================== --- config/i386/sse.md (revision 157148) +++ config/i386/sse.md (working copy) @@ -3068,6 +3069,29 @@ (define_expand "vec_unpacks_hi_v4sf" operands[2] = gen_reg_rtx (V4SFmode); }) +(define_expand "vec_unpacks_hi_v8sf" + [(set (match_dup 2) + (vec_select:V8SF + (vec_concat:V16SF + (match_dup 2) + (match_operand:V8SF 1 "nonimmediate_operand" "")) + (parallel [(const_int 12) + (const_int 13) + (const_int 14) + (const_int 15) + (const_int 4) + (const_int 5) + (const_int 6) + (const_int 7)]))) + (set (match_operand:V4DF 0 "register_operand" "") + (float_extend:V4DF + (subreg:V4SF + (match_dup 2) 0)))] + "TARGET_AVX" +{ + operands[2] = gen_reg_rtx (V8SFmode); +}) + (define_expand "vec_unpacks_lo_v4sf" [(set (match_operand:V2DF 0 "register_operand" "") (float_extend:V2DF @@ -3076,6 +3100,13 @@ (define_expand "vec_unpacks_lo_v4sf" (parallel [(const_int 0) (const_int 1)]))))] "TARGET_SSE2") +(define_expand "vec_unpacks_lo_v8sf" + [(set (match_operand:V4DF 0 "register_operand" "") + (float_extend:V4DF + (subreg:V4SF + (match_operand:V8SF 1 "nonimmediate_operand" "") 0)))] + "TARGET_AVX") + (define_expand "vec_unpacks_float_hi_v8hi" [(match_operand:V4SF 0 "register_operand" "") (match_operand:V8HI 1 "register_operand" "")] works, curiously matching what the SSE patterns do (vec_select of the lower part of the vector) does not. -- Summary: Vectorizer patterns missing for AVX Product: gcc Version: 4.5.0 Status: UNCONFIRMED Keywords: missed-optimization Severity: enhancement Priority: P3 Component: target AssignedTo: unassigned at gcc dot gnu dot org ReportedBy: rguenth at gcc dot gnu dot org http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43231