http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54910
--- Comment #4 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> 2012-11-29 11:15:44 UTC --- (In reply to comment #3) > ... and this particular case wouldn't arise, since Thumb-2 (ARMv7) implies the > CLZ instruction (ARMv5), and I wouldn't need this table-based implementation > if > I had CLZ. :-) It pretty much applies to T16 (Thumb-1) and v4t for A32 (ARM) state. Ramana
