https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359
--- Comment #11 from Jeremy <gcc.hall at gmail dot com> --- int32_t n; asm( "str %1,[%0],#4" : "+r" (ptr) : "r" (n) : "memory" ); Caught me until I just happened to examine the assembler. Of course %w1 works - but then I need SEPARATE code for 32-bit ARM and for aarch64. Now arnv8 has two register sizes, I ask also, please could it work like x86 and use the operand size to determine which to emit, x or w.