https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79137
Bug ID: 79137
Summary: Improve powerpc vector permutes
Product: gcc
Version: 7.0
Status: UNCONFIRMED
Severity: enhancement
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: meissner at gcc dot gnu.org
Target Milestone: ---
Created attachment 40540
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40540&action=edit
Sample code that should be optimized.
In config/rs6000/rs6000.c is a function altivec_expand_vec_perm_const which it
is claimed to optimize certain vperm/vpermr/xxperm/xxpermr permute instructions
to use existing Altivec/VSX instructions.
The only call to altivec_expand_vec_perm_const is in the vec_perm_constv16qi
insn in altivec.md. However, there is no reference to vec_perm_constv16qi, so
it never gets called.
I went back to various GCC versions, going back to GCC 4.6, and I could not
find any compiler where this optimization is being done.
We should add a combiner pattern that recognizes these constant permutes, and
does the appropriate instruction. We should add recognizers for the ISA 3.0
byte reverse instructions (XXBRQ, XXBRD, XXBRW, and XXBRH) as well.
