LGTM for the patch
Li, Pan2 <pan2...@intel.com> 於 2024年2月21日 週三 12:31 寫道：
> Hi kito and juzhe.
>
> There may be 2 items for double-confirm. Thanks a lot.
>
> 1. Not very sure if we need to upgrade the version for
> __riscv_th_v_intrinsic.
>
Yes since 0.11 and 0.12 is not really compatible
2. Do we need to upgrade the even a newer version (like 1.0) for the GCC 14
> release, or we can do it later.
>
Yeah, Ideal case is we can update that before release made :p
> Pan
>
> -----Original Message-----
> From: Li, Pan2 <pan2...@intel.com>
> Sent: Wednesday, February 21, 2024 12:27 PM
> To: gcc-patches@gcc.gnu.org
> Cc: juzhe.zh...@rivai.ai; Li, Pan2 <pan2...@intel.com>; Wang, Yanzhang <
> yanzhang.w...@intel.com>; kito.ch...@gmail.com
> Subject: [PATCH v1] RISC-V: Upgrade RVV intrinsic version to 0.12
>
> From: Pan Li <pan2...@intel.com>
>
> Upgrade the version of RVV intrinsic from 0.11 to 0.12.
>
> PR target/114017
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Upgrade
> the version to 0.12.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/predef-__riscv_v_intrinsic.c: Update the
> version to 0.12.
> * gcc.target/riscv/rvv/base/pr114017-1.c: New test.
>
> Signed-off-by: Pan Li <pan2...@intel.com>
> ---
> gcc/config/riscv/riscv-c.cc | 2 +-
> .../riscv/predef-__riscv_v_intrinsic.c | 2 +-
> .../gcc.target/riscv/rvv/base/pr114017-1.c | 19 +++++++++++++++++++
> 3 files changed, 21 insertions(+), 2 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr114017-1.c
>
> diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc
> index 3ef06dcfd2d..3755ec0b8ef 100644
> --- a/gcc/config/riscv/riscv-c.cc
> +++ b/gcc/config/riscv/riscv-c.cc
> @@ -139,7 +139,7 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile)
> {
> builtin_define ("__riscv_vector");
> builtin_define_with_int_value ("__riscv_v_intrinsic",
> - riscv_ext_version_value (0, 11));
> + riscv_ext_version_value (0, 12));
> }
>
> if (TARGET_XTHEADVECTOR)
> diff --git a/gcc/testsuite/gcc.target/riscv/predef-__riscv_v_intrinsic.c
> b/gcc/testsuite/gcc.target/riscv/predef-__riscv_v_intrinsic.c
> index dbbedf54f87..07f1f159a8f 100644
> --- a/gcc/testsuite/gcc.target/riscv/predef-__riscv_v_intrinsic.c
> +++ b/gcc/testsuite/gcc.target/riscv/predef-__riscv_v_intrinsic.c
> @@ -3,7 +3,7 @@
>
> int main () {
>
> -#if __riscv_v_intrinsic != 11000
> +#if __riscv_v_intrinsic != 12000
> #error "__riscv_v_intrinsic"
> #endif
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr114017-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr114017-1.c
> new file mode 100644
> index 00000000000..8eee7c68f71
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr114017-1.c
> @@ -0,0 +1,19 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
> +
> +#include "riscv_vector.h"
> +
> +vuint8mf2_t
> +test (vuint16m1_t val, size_t shift, size_t vl)
> +{
> +#if __riscv_v_intrinsic == 11000
> + #warning "RVV Intrinsics v0.11"
> + return __riscv_vnclipu (val, shift, vl);
> +#endif
> +
> +#if __riscv_v_intrinsic == 12000
> + #warning "RVV Intrinsics v0.12" /* { dg-warning "RVV Intrinsics v0.12"
> } */
> + return __riscv_vnclipu (val, shift, 0, vl);
> +#endif
> +}
> +
> --
> 2.34.1
>
>
