> I'd really like to know is if we should have just one ID or two. I'd > personally rather stick with one. Maybe we just call it > memoryAccessID or sharerID
memoryAccessID sounds like the right term here. > > I'm not sure that it would complicate things much. The idea is to > just put the things that are for memory requests into a base class and > have thread context derive from that. So, not adding stuff, just > splitting the class into two parts. > I see, that's not too bad then. > > > I thought the easiest way would be to use the port connections to > traverse > > the system since something is already done for the snoop Port > > registration.The only trick would be for CPUs with multiple threads you > need > > to ask out how many contexts it's going to share. > Yeah, it is doable. It would probably be nice to have a routine that > is just designed to traverse the memory hierarchy and call a member > function on every object in the hierarchy. I think registering with > the system gets the same effect and is potentially simpler. > That routine would be useful I agree. What I ran into when I started this is you can't necessarily just sum up values though because things share the same bus. Thus, if you ask an icache and a dcache for "num sharers" then you get back 1 both time, but you can't sum those. So the traversal algorithm has to be smart enough to count unique sharers (stl set?) on a bus and then pass that value down the hierarchy for it to work right. -- - Korey _______________________________________________ gem5-dev mailing list gem5-dev@m5sim.org http://m5sim.org/mailman/listinfo/gem5-dev
