> On 2011-05-26 23:29:05, Gabe Black wrote:
> > What does Self.all do? What is it for? You have one use in the change so I 
> > have a basic idea, but it would be helpful to know the specifics.

It's similar to Parent.any in that it traverses the object hierarchy and finds 
all  (as opposed to one) objects that are of a certain type.  As you see from 
the memories example, the system object can have a pointer to all 
PhysicalMemory objects that belong to that system. The reason to add something 
like this, is to have a generic way to prevent speculation from touching I/O. 
It's possible for a speculative instruction fetch to sneak out of the CPU if 
the wrong 10 things all happen an once and with this another change can prevent 
that (will post soon). It's not as simple as just not fetching from 
non-cacheable memory, since most architectures start their processors in some 
kind of caches disabled, tlb should only issue non-cachable transaction state.


- Ali


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On 2011-05-26 19:17:18, Ali Saidi wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.m5sim.org/r/720/
> -----------------------------------------------------------
> 
> (Updated 2011-05-26 19:17:18)
> 
> 
> Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
> Nathan Binkert.
> 
> 
> Summary
> -------
> 
> Config: Add support for a Self.all proxy object
> 
> 
> Diffs
> -----
> 
>   src/python/m5/SimObject.py 3f37cc5d25bc 
>   src/python/m5/params.py 3f37cc5d25bc 
>   src/python/m5/proxy.py 3f37cc5d25bc 
>   src/sim/System.py 3f37cc5d25bc 
> 
> Diff: http://reviews.m5sim.org/r/720/diff
> 
> 
> Testing
> -------
> 
> 
> Thanks,
> 
> Ali
> 
>

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