Thanks, one (or more) of these patches did the trick.
On Tue, May 17, 2011 at 12:41 AM, Ali Saidi <sa...@umich.edu> wrote: > The following patches on reviewboard probably solve your issue: > http://reviews.m5sim.org/r/695/ > http://reviews.m5sim.org/r/696/ > http://reviews.m5sim.org/r/697/ > > If they don't you'll need to look at debugging from a checkpoint that > experiences the issue with tracediff: > http://www.m5sim.org/Debugging#tracediff > > Ali > > > On Sun, 15 May 2011 20:03:26 -0400, Gedare Bloom <ged...@gwmail.gwu.edu> > wrote: >> >> Hi, >> >> I am trying to get some baseline runs to work in ARM_FS. I have >> successfully built and run the ocean (contiguous) benchmark from >> SPLASH-2 on ARM_FS with both simple and timing (-t with and without >> --cache) CPU with default parameters using fs.py. However, during a >> run with detailed CPU (-d --caches), the ocean binary (not M5) seg >> faults and control returns to the simulated system's shell. Does >> anyone know some reasons that a program would crash with O3CPU but not >> Atomic or Timing? >> _______________________________________________ >> gem5-users mailing list >> gem5-users@m5sim.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > _______________________________________________ > gem5-users mailing list > gem5-users@m5sim.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > _______________________________________________ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
