Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=53521d8c90d366191b6c134f88a8ebe83de60614
Commit: 53521d8c90d366191b6c134f88a8ebe83de60614
Parent: c2bcbe65fc88d61f9a806367ff6eab76c9eabb3a
Author: Michael Buesch <[EMAIL PROTECTED]>
AuthorDate: Tue Feb 19 16:22:50 2008 +0100
Committer: John W. Linville <[EMAIL PROTECTED]>
CommitDate: Wed Feb 20 20:11:49 2008 -0500
ssb: Make the GPIO API reentrancy safe
This fixes the GPIO API to be reentrancy safe.
Signed-off-by: Michael Buesch <[EMAIL PROTECTED]>
Signed-off-by: John W. Linville <[EMAIL PROTECTED]>
---
drivers/ssb/driver_chipcommon.c | 6 --
drivers/ssb/driver_extif.c | 5 --
drivers/ssb/embedded.c | 106 ++++++++++++++++++++++++++++++++++++++
drivers/ssb/main.c | 3 +
include/linux/ssb/ssb.h | 5 ++
include/linux/ssb/ssb_embedded.h | 8 +++
6 files changed, 122 insertions(+), 11 deletions(-)
diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c
index 7ea0c0f..e586321 100644
--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
@@ -357,37 +357,31 @@ u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32
mask)
{
return chipco_read32(cc, SSB_CHIPCO_GPIOIN) & mask;
}
-EXPORT_SYMBOL(ssb_chipco_gpio_in);
u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value)
{
return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value);
}
-EXPORT_SYMBOL(ssb_chipco_gpio_out);
u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value)
{
return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value);
}
-EXPORT_SYMBOL(ssb_chipco_gpio_outen);
u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value)
{
return chipco_write32_masked(cc, SSB_CHIPCO_GPIOCTL, mask, value);
}
-EXPORT_SYMBOL(ssb_chipco_gpio_control);
u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value)
{
return chipco_write32_masked(cc, SSB_CHIPCO_GPIOIRQ, mask, value);
}
-EXPORT_SYMBOL(ssb_chipco_gpio_intmask);
u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value)
{
return chipco_write32_masked(cc, SSB_CHIPCO_GPIOPOL, mask, value);
}
-EXPORT_SYMBOL(ssb_chipco_gpio_polarity);
#ifdef CONFIG_SSB_SERIAL
int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
diff --git a/drivers/ssb/driver_extif.c b/drivers/ssb/driver_extif.c
index 10c6b28..c3e1d3e 100644
--- a/drivers/ssb/driver_extif.c
+++ b/drivers/ssb/driver_extif.c
@@ -122,30 +122,25 @@ u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask)
{
return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask;
}
-EXPORT_SYMBOL(ssb_extif_gpio_in);
u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value)
{
return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
mask, value);
}
-EXPORT_SYMBOL(ssb_extif_gpio_out);
u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value)
{
return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
mask, value);
}
-EXPORT_SYMBOL(ssb_extif_gpio_outen);
u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value)
{
return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
}
-EXPORT_SYMBOL(ssb_extif_gpio_polarity);
u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value)
{
return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
}
-EXPORT_SYMBOL(ssb_extif_gpio_intmask);
diff --git a/drivers/ssb/embedded.c b/drivers/ssb/embedded.c
index 751f58a..d3ade82 100644
--- a/drivers/ssb/embedded.c
+++ b/drivers/ssb/embedded.c
@@ -11,6 +11,8 @@
#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_embedded.h>
+#include "ssb_private.h"
+
int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks)
{
@@ -24,3 +26,107 @@ int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks)
}
return -ENODEV;
}
+
+u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask)
+{
+ unsigned long flags;
+ u32 res = 0;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ if (ssb_chipco_available(&bus->chipco))
+ res = ssb_chipco_gpio_in(&bus->chipco, mask);
+ else if (ssb_extif_available(&bus->extif))
+ res = ssb_extif_gpio_in(&bus->extif, mask);
+ else
+ SSB_WARN_ON(1);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(ssb_gpio_in);
+
+u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value)
+{
+ unsigned long flags;
+ u32 res = 0;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ if (ssb_chipco_available(&bus->chipco))
+ res = ssb_chipco_gpio_out(&bus->chipco, mask, value);
+ else if (ssb_extif_available(&bus->extif))
+ res = ssb_extif_gpio_out(&bus->extif, mask, value);
+ else
+ SSB_WARN_ON(1);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(ssb_gpio_out);
+
+u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value)
+{
+ unsigned long flags;
+ u32 res = 0;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ if (ssb_chipco_available(&bus->chipco))
+ res = ssb_chipco_gpio_outen(&bus->chipco, mask, value);
+ else if (ssb_extif_available(&bus->extif))
+ res = ssb_extif_gpio_outen(&bus->extif, mask, value);
+ else
+ SSB_WARN_ON(1);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(ssb_gpio_outen);
+
+u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value)
+{
+ unsigned long flags;
+ u32 res = 0;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ if (ssb_chipco_available(&bus->chipco))
+ res = ssb_chipco_gpio_control(&bus->chipco, mask, value);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(ssb_gpio_control);
+
+u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value)
+{
+ unsigned long flags;
+ u32 res = 0;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ if (ssb_chipco_available(&bus->chipco))
+ res = ssb_chipco_gpio_intmask(&bus->chipco, mask, value);
+ else if (ssb_extif_available(&bus->extif))
+ res = ssb_extif_gpio_intmask(&bus->extif, mask, value);
+ else
+ SSB_WARN_ON(1);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(ssb_gpio_intmask);
+
+u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value)
+{
+ unsigned long flags;
+ u32 res = 0;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ if (ssb_chipco_available(&bus->chipco))
+ res = ssb_chipco_gpio_polarity(&bus->chipco, mask, value);
+ else if (ssb_extif_available(&bus->extif))
+ res = ssb_extif_gpio_polarity(&bus->extif, mask, value);
+ else
+ SSB_WARN_ON(1);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(ssb_gpio_polarity);
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index 9028ed5..af07ab2 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -569,6 +569,9 @@ static int ssb_bus_register(struct ssb_bus *bus,
spin_lock_init(&bus->bar_lock);
INIT_LIST_HEAD(&bus->list);
+#ifdef CONFIG_SSB_EMBEDDED
+ spin_lock_init(&bus->gpio_lock);
+#endif
/* Powerup the bus */
err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index 9d5da8b..d14c036 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -283,6 +283,11 @@ struct ssb_bus {
/* Contents of the SPROM. */
struct ssb_sprom sprom;
+#ifdef CONFIG_SSB_EMBEDDED
+ /* Lock for GPIO register access. */
+ spinlock_t gpio_lock;
+#endif /* EMBEDDED */
+
/* Internal-only stuff follows. Do not touch. */
struct list_head list;
#ifdef CONFIG_SSB_DEBUG
diff --git a/include/linux/ssb/ssb_embedded.h b/include/linux/ssb/ssb_embedded.h
index 80bd584..8d8dedf 100644
--- a/include/linux/ssb/ssb_embedded.h
+++ b/include/linux/ssb/ssb_embedded.h
@@ -7,4 +7,12 @@
extern int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks);
+/* Generic GPIO API */
+u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask);
+u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value);
+u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value);
+u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value);
+u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value);
+u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value);
+
#endif /* LINUX_SSB_EMBEDDED_H_ */
-
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