All, I have been looking at DRLVM contained in JIRA Harmony-438. As far as I can tell, it does not have write barrier support. Write barrier support is pretty much required for high performance garbage collectors. In anticipation of using DRLVM with modern GCs like MMTK, I'd like to add write barrier support.
DRLVM contains a simple JIT called Jitrino.JET in addition to a highly optimizing JIT. The simple JIT seems to be a better choice for starting the write barrier work. Looking at Jitrino.JET sources, it looks like the best place to add write barriers is in cg_ia32.cpp: Compiler::gen_st() {.......} Does this seem right? Also, I have looked for documentation on Jitrino.JET but have not been able to locate it. It would be nice see some graphic documentation on how the compiler spill/fills between the stack and registers. And also how the compiler deals with the live ranges of reference variables. In specific how root set enumeration works. While not absolutely essential for hacking in write barriers, it will help a bunch during the debug stage. Thanks -- Weldon Washburn Intel Middleware Products Division --------------------------------------------------------------------- Terms of use : http://incubator.apache.org/harmony/mailing.html To unsubscribe, e-mail: [EMAIL PROTECTED] For additional commands, e-mail: [EMAIL PROTECTED]