On Mon, Mar 25, 2024 at 04:30:14PM +0200, Ville Syrjälä wrote:
> On Mon, Mar 25, 2024 at 01:23:27PM +0200, Stanislav Lisovskiy wrote:
> > In order to make sure we are not breaking the proper sequence
> > lets to updates step by step and don't change MBUS join value
> > during MDCLK/CDCLK programming stage.
> > MBUS join programming would be taken care by pre/post ddb hooks.
> > 
> > v2: - Reworded comment about using old mbus_join value in
> >       intel_set_cdclk(Ville Syrjälä)
> > 
> > Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovs...@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_cdclk.c | 12 +++++++++++-
> >  1 file changed, 11 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
> > b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index 31aaa9780dfcf..c7813d433c424 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -2611,9 +2611,19 @@ intel_set_cdclk_pre_plane_update(struct 
> > intel_atomic_state *state)
> >  
> >     if (pipe == INVALID_PIPE ||
> >         old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk) {
> > +           struct intel_cdclk_config cdclk_config;
> > +
> >             drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed);
> >  
> > -           intel_set_cdclk(i915, &new_cdclk_state->actual, pipe);
> > +           /*
> > +            * By this hack we want to prevent mbus_join to be changed
> > +            * beforehand
> 
> That sentence is still confusing.

Write it yourself then. I'm not going to rephrase it anymore.

> 
> > - we will take care of this later in
> > +            * intel_dbuf_mbus_post_ddb_update
> > +            */
> > +           cdclk_config = new_cdclk_state->actual;
> > +           cdclk_config.joined_mbus = old_cdclk_state->actual.joined_mbus;
> > +
> > +           intel_set_cdclk(i915, &cdclk_config, pipe);
> >     }
> >  }
> >  
> > -- 
> > 2.37.3
> 
> -- 
> Ville Syrjälä
> Intel

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