Tested-by: "Yang, Guang A" <guang.a.y...@intel.com> With this patch, the 32 bit system can be able to boot normally.
Best Regards~~ Open Source Technology Center (OTC) Terence Yang（杨光） Tel: 86-021-61167360 iNet: 8821-7360 > -----Original Message----- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of > Ben Widawsky > Sent: Wednesday, May 28, 2014 7:53 AM > To: Intel GFX > Cc: Ben Widawsky; sta...@vger.kernel.org; Widawsky, Benjamin > Subject: [Intel-gfx] [PATCH] [v5] drm/i915/bdw: Only use 2g GGTT for 32b > platforms > > Daniel requested in the bug that I use a 3GB fallback size. Since this is not > in > the spec as a valid size, I decided against it. We could potentially add a > patch to > bump it to 3GB on top of this one. > > This probably should be CC: stable - but I'll let the powers that be decide > that > one. > > Regression from a revert of the revert: > commit 7907f45bf9f67a1c5e5d4ae05bab428d7c2f43b2 > Author: Ben Widawsky <benjamin.widaw...@intel.com> > Date: Wed Feb 19 22:05:46 2014 -0800 > > Revert "drm/i915/bdw: Limit GTT to 2GB" > > v2: Change ifdef to 32b, instead of ifndef update comment > > v3. Update comment to not wrap (Daniel). > Update commit message > > v4: s/CONFIG_32/CONFIG_X86_32 (Jani). > > v5: s/CONFIG_x86_32BIT/CONFIG_x86_32, as meant in v4 s/32B/32b (chris) > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76619 > Cc: sta...@vger.kernel.org > Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch> > Signed-off-by: Rodrigo Vivi <rodrigo.v...@gmail.com> > Signed-off-by: Ben Widawsky <b...@bwidawsk.net> > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c > b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 931b906..eec820a 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -1775,6 +1775,13 @@ static inline unsigned int > gen8_get_total_gtt_size(u16 bdw_gmch_ctl) > bdw_gmch_ctl &= BDW_GMCH_GGMS_MASK; > if (bdw_gmch_ctl) > bdw_gmch_ctl = 1 << bdw_gmch_ctl; > + > +#ifdef CONFIG_X86_32 > + /* Limit 32b platforms to a 2GB GGTT: 4 << 20 / pte size * PAGE_SIZE */ > + if (bdw_gmch_ctl > 4) > + bdw_gmch_ctl = 4; > +#endif > + > return bdw_gmch_ctl << 20; > } > > -- > 1.9.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
