https://bugs.kde.org/show_bug.cgi?id=360008
--- Comment #4 from Carl Love <c...@us.ibm.com> --- Created attachment 98384 --> https://bugs.kde.org/attachment.cgi?id=98384&action=edit proposed patch to fix issue Attached is a patch to deal with the issue. Turns out there are several issues. 1) there is a big Endian/ little Endian issue that was missed earlier. The patch fixes that. Once the Endian issue was fixed, then the vsx register definition file that Phillippe mentions was added. That requires adding the new registers to the register structure and the case statement to get fetch the register values from the guest state. Finally, the order GDB prints the real guest register contents and the order the shadow registers in was not consistent. Specifically, the HW register print order was: GPRs, Floating point registers, then the pc, msr, cr, lr, ctr, etc registers. However, the order GDB printed the shadow registers was: GPRs, pc, msr, cr, lr, ctr, etc, then the Floating point registers. The issue was the shadow register name and contents didn't line up. The register contents order matched the HW register print order. So initially the fp0s1 register value was printed with pcs1. The shadow register xml definition file for the GPRs and pc, msr, lr, etc had to be split into two files. The first file contains the GPRs. The second file contains the pc,msr, lr, etc. The second file with the shadow pc, msr, lr, etc. definitions was then included after the shadow floating point register xml file. This results in GDB printing the shadow register names in the same order as the HW registers and the register contents now align to the correct register name. Please review the patch and let me know if you have any suggested changes/fixes. Thanks. -- You are receiving this mail because: You are watching all bug changes.
