https://bugs.kde.org/show_bug.cgi?id=436411
ahashmi <assad.has...@linaro.org> changed:
What |Removed |Added
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Attachment #138343|0 |1
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--- Comment #4 from ahashmi <assad.has...@linaro.org> ---
Created attachment 138947
--> https://bugs.kde.org/attachment.cgi?id=138947&action=edit
Adds arm64 v8.2 scalar FABD, FACGE, FACGT and FADD instructions
Thanks for reviewing, apologies for the delay in responding.
The first issue pertaining to CPU feature-gating of the front-end was something
I did implement in the first v8.2 instruction, FADDP
(https://bugs.kde.org/show_bug.cgi?id=413547) but for some reason ommitted in
later v8.2 work! I've added the VEX_HWCAPS_ARM64_FP16 check for all
half-precision FP instructions.
The second issue to do with the Iex_Const case for iselIntExpr_RIL_wrk() turns
out to be some sort of confusion on my part! I can't remember exactly what
happened but I think an assert to catch Ity_I16 must've fired partway through
development and I just assumed it was the the Iex_Const in
iselIntExpr_RIL_wrk(). Anyway, I've removed the unnecessary changes and tested
on v8.x where x<3.
I'd prefer to get this patch past review and merged before addressing the same
hwcaps-gating issue in https://bugs.kde.org/show_bug.cgi?id=436873.
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