> >> PLE: > >> - works for unmodified / non-Linux guests > >> - works for all types of spins (e.g. smp_call_function*()) > >> - utilizes an existing hardware interface (PAUSE instruction) so likely > >> more robust compared to a software interface > >> > >> PV: > >> - has more information, so it can perform better > > > > Should we also consider that we always have an edge here for non-PLE > > machine? > > True. The deployment share for these is decreasing rapidly though. I > hate optimizing for obsolete hardware.
Keep in mind that the patchset that Jeremy provided also cleans (remove) parts of the pv spinlock code. It removes the various spin_lock, spin_unlock, etc that touch paravirt code. Instead the pv code is only in the slowpath. And if you don't compile with CONFIG_PARAVIRT_SPINLOCK the end code is the same as it is now. On a different subject- I am curious whether the Haswell new locking instructions (the transactional ones?) can be put in usage for the slow case? -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
